Patents by Inventor Masanori Koizumi

Masanori Koizumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11685152
    Abstract: A print head assembled to a liquid ejecting apparatus ejecting a liquid with respect to a medium includes an ejecting portion ejecting the liquid in response to a drive signal and an electrically erasable non-volatile memory, and the non-volatile memory stores history information changing in accordance with an operation state of the print head.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: June 27, 2023
    Inventors: Eiji Takagi, Masanori Koizumi, Shunya Komatsu, Shuichi Nakano, Masashi Kamiyanagi, Toru Matsuyama
  • Patent number: 11577505
    Abstract: A print head drive circuit drives a print head including an ejecting portion ejecting a liquid in response to a drive signal propagating through a drive signal line and a storage portion storing ejecting portion-related information changing in accordance with use of the ejecting portion, in which processing of reading the ejecting portion-related information changing in accordance with the use from the storage portion is performed before the drive signal for ejecting the liquid from the ejecting portion is supplied to the print head.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: February 14, 2023
    Inventors: Eiji Takagi, Masanori Koizumi, Shunya Komatsu, Shuichi Nakano, Masashi Kamiyanagi, Toru Matsuyama
  • Patent number: 11383523
    Abstract: A print head drive circuit outputs an output signal from a terminal electrically coupled to a low voltage logic signal input terminal to which a low voltage logic signal is input and has a first mode in which the print head drive circuit controls a print head to execute reading processing of reading information stored in a memory and not to execute ejection control processing of controlling whether or not to supply a high voltage signal to an ejecting portion group by switching a switch group in accordance with the output signal and a second mode in which the print head drive circuit controls the print head not to execute the reading processing and to execute the ejection control processing in accordance with the output signal.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: July 12, 2022
    Inventors: Eiji Takagi, Masanori Koizumi, Shunya Komatsu, Shuichi Nakano, Masashi Kamiyanagi, Toru Matsuyama
  • Patent number: 11207886
    Abstract: A print head includes ejecting portions ejecting liquid by being supplied with a high voltage signal, a switch group switching between whether or not to supply the high voltage signal to the first ejecting portion group in accordance with a low voltage logic signal, a memory, a high voltage signal input terminal, and a low voltage logic signal input terminal, the print head having a first mode in which the print head executes reading processing of reading information stored in the memory and does not execute ejection control processing of controlling whether or not to supply the high voltage signal to the first ejecting portion group by switching the switch group in accordance with an input signal input from the low voltage logic signal input terminal and a second mode in which the print head does not execute the reading processing and executes the ejection control processing.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: December 28, 2021
    Inventors: Eiji Takagi, Masanori Koizumi, Shunya Komatsu, Shuichi Nakano, Masashi Kamiyanagi, Toru Matsuyama
  • Publication number: 20210094276
    Abstract: A print head includes ejecting portions ejecting liquid by being supplied with a high voltage signal, a switch group switching between whether or not to supply the high voltage signal to the first ejecting portion group in accordance with a low voltage logic signal, a memory, a high voltage signal input terminal, and a low voltage logic signal input terminal, the print head having a first mode in which the print head executes reading processing of reading information stored in the memory and does not execute ejection control processing of controlling whether or not to supply the high voltage signal to the first ejecting portion group by switching the switch group in accordance with an input signal input from the low voltage logic signal input terminal and a second mode in which the print head does not execute the reading processing and executes the ejection control processing.
    Type: Application
    Filed: September 25, 2020
    Publication date: April 1, 2021
    Inventors: Eiji TAKAGI, Masanori KOIZUMI, Shunya KOMATSU, Shuichi NAKANO, Masashi KAMIYANAGI, Toru MATSUYAMA
  • Publication number: 20210094280
    Abstract: A print head assembled to a liquid ejecting apparatus ejecting a liquid with respect to a medium includes an ejecting portion ejecting the liquid in response to a drive signal and an electrically erasable non-volatile memory, and the non-volatile memory stores history information changing in accordance with an operation state of the print head.
    Type: Application
    Filed: September 25, 2020
    Publication date: April 1, 2021
    Inventors: Eiji TAKAGI, Masanori KOIZUMI, Shunya KOMATSU, Shuichi NAKANO, Masashi KAMIYANAGI, Toru MATSUYAMA
  • Publication number: 20210094282
    Abstract: A print head drive circuit drives a print head including an ejecting portion ejecting a liquid in response to a drive signal propagating through a drive signal line and a storage portion storing ejecting portion-related information changing in accordance with use of the ejecting portion, in which processing of reading the ejecting portion-related information changing in accordance with the use from the storage portion is performed before the drive signal for ejecting the liquid from the ejecting portion is supplied to the print head.
    Type: Application
    Filed: September 25, 2020
    Publication date: April 1, 2021
    Inventors: Eiji TAKAGI, Masanori KOIZUMI, Shunya KOMATSU, Shuichi NAKANO, Masashi KAMIYANAGI, Toru MATSUYAMA
  • Publication number: 20210094306
    Abstract: A print head drive circuit outputs an output signal from a terminal electrically coupled to a low voltage logic signal input terminal to which a low voltage logic signal is input and has a first mode in which the print head drive circuit controls a print head to execute reading processing of reading information stored in a memory and not to execute ejection control processing of controlling whether or not to supply a high voltage signal to an ejecting portion group by switching a switch group in accordance with the output signal and a second mode in which the print head drive circuit controls the print head not to execute the reading processing and to execute the ejection control processing in accordance with the output signal.
    Type: Application
    Filed: September 25, 2020
    Publication date: April 1, 2021
    Inventors: Eiji TAKAGI, Masanori KOIZUMI, Shunya KOMATSU, Shuichi NAKANO, Masashi KAMIYANAGI, Toru MATSUYAMA
  • Patent number: 7071567
    Abstract: A semiconductor device includes: a substrate on which is formed an interconnecting pattern; a first semiconductor chip provided above the substrate and having a first electrode on a surface facing the substrate; and a second semiconductor chip provided above the first semiconductor chip and having a second electrode on a surface facing the substrate. The substrate has a bent portion inclined from the first electrode to the second electrode. The interconnecting pattern extends along the bent portion and electrically connected to the first and second electrodes.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: July 4, 2006
    Assignee: Seiko Epson Corporation
    Inventor: Masanori Koizumi
  • Publication number: 20040142539
    Abstract: A semiconductor device includes: a substrate on which is formed an interconnecting pattern; a first semiconductor chip provided above the substrate and having a first electrode on a surface facing the substrate; and a second semiconductor chip provided above the first semiconductor chip and having a second electrode on a surface facing the substrate. The substrate has a bent portion inclined from the first electrode to the second electrode. The interconnecting pattern extends along the bent portion and electrically connected to the first and second electrodes.
    Type: Application
    Filed: October 15, 2003
    Publication date: July 22, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Masanori Koizumi
  • Patent number: 6690213
    Abstract: A chopper type comparator is equipped with an input switching circuit 1 that switches between an input voltage VIN and a reference voltage VRE, a capacitor C1, and an amplification circuit 11 that is formed from amplifiers (CMOS inverters) 12. The input switching circuit 1 is provided with a switch CT1 that turns on and off the input voltage VIN, and a switch CT2 that turns on and off the reference voltage VRE. Rising and falling of control signals to the P channel and N channel transistors of the switches CT1 and CT2 are simultaneously conducted, and an intersection of the rising and falling sections thereof coincide with a center of the amplitude of the drive signals.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: February 10, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Masanori Koizumi
  • Publication number: 20030011410
    Abstract: A chopper type comparator is equipped with an input switching circuit 1 that switches between an input voltage VIN and a reference voltage VRE, a capacitor C1, and an amplification circuit 11 that is formed from amplifiers (CMOS inverters) 12. The input switching circuit 1 is provided with a switch CT1 that turns on and off the input voltage VIN, and a switch CT2 that turns on and off the reference voltage VRE. Rising and falling of control signals to the P channel and N channel transistors of the switches CT1 and CT2 are simultaneously conducted, and an intersection of the rising and falling sections thereof coincide with a center of the amplitude of the drive signals.
    Type: Application
    Filed: June 26, 2002
    Publication date: January 16, 2003
    Inventor: Masanori Koizumi