Abstract: Provided are a novel compound useful for adjusting sweetness or saltiness or inhibiting ENaC, and use thereof. An octenyl sulfate ester of the following Formula (1) or a salt thereof, wherein the wavy line represents any one of cis- or trans-configuration.

Abstract: In an LNG tank, a dike is formed by arranging precast blocks in the circumferential direction and layering the precast blocks in the vertical direction. Each of the precast blocks has loop joints on the top, bottom, left, and right side faces, and concrete is deposited between each two precast blocks adjacent in the circumferential direction and the vertical direction, whereby masonry joints are formed in the vertical direction and the circumferential direction. Prestress is imparted to the dike by PC steel members. The PC steel members are provided in the circumferential direction and the vertical direction of the dike, and are arranged so as to avoid the masonry joints in the circumferential direction and the vertical direction. Therefore, it is possible to construct the dike in a short time, and it is possible to provide a tank or the like that can reduce the construction period.

Abstract: In an LNG tank, a dike is formed by arranging precast blocks in the circumferential direction and layering the precast blocks in the vertical direction. Each of the precast blocks has loop joints on the top, bottom, left, and right side faces, and concrete is deposited between each two precast blocks adjacent in the circumferential direction and the vertical direction, whereby masonry joints are formed in the vertical direction and the circumferential direction. Prestress is imparted to the dike by PC steel members. The PC steel members are provided in the circumferential direction and the vertical direction of the dike, and are arranged so as to avoid the masonry joints in the circumferential direction and the vertical direction. Therefore, it is possible to construct the dike in a short time, and it is possible to provide a tank or the like that can reduce the construction period.

Abstract: A video decoding device is a video decoding device that decodes a stream constituted by a data sequence including header information and compressed image data. The video decoding device includes a storage and a decoding processor. The storage holds the header information and the compressed image data in the stream. The decoding processor analyzes the header information and decodes the compressed image data. When it is determined that an error has occurred during decoding processing of the compressed image data based on an analysis result of the header information, the decoding processor analyzes information necessary for decoding compressed image data included in the compressed image data in a subsequent stream and decodes the compressed image data.

Abstract: Provided is a production method for an ellagic acid composition excellent in solubility in water. The production method for an ellagic acid composition includes the steps of: mixing an aqueous medium with a raw material which contains a guava leaf extract and which contains, in solids thereof, 1 to 5% by mass of free ellagic acid to prepare a material for heat treatment; and subjecting the material for heat treatment to heat treatment at from 100 to 180° C.

Abstract: Provided are a novel compound useful for adjusting sweetness or saltiness or inhibiting ENaC, and use thereof. An octenyl sulfate ester of the following Formula (1) or a salt thereof, wherein the wavy line represents any one of cis- or trans-configuration.

Abstract: Provided is a production method for an ellagic acid composition excellent in solubility in water. The production method for an ellagic acid composition includes the steps of: mixing an aqueous medium with a raw material which contains a guava leaf extract and which contains, in solids thereof, 1 to 5% by mass of free ellagic acid to prepare a material for heat treatment; and subjecting the material for heat treatment to heat treatment at from 100 to 180° C.

Abstract: A rewriting apparatus of a vehicle program rewriting system predicts, on the basis of both a state of a battery at the time of starting rewriting the programs of ECUs and a scheduled process time period of rewiring the programs, a state of the battery after rewriting the programs, and executes rewriting the programs if the predicted state of the battery satisfies a condition on which the vehicle can be restarted.

Abstract: While software in a relay device is being rewritten by an external diagnosis device, a processing unit of the relay device prohibits transfer processing of data from each ECU connected to CAN bus and allows transfer processing of data, which is transmitted from the external diagnosis device and which indicates at least either one of transmission prohibition of periodic transmission data and storage prohibition of a failure code into each ECU by not receiving the periodic transmission data in each ECU, to the CAN buses.

Abstract: While software in a relay device is being rewritten by an external diagnosis device, a processing unit of the relay device prohibits transfer processing of data from each ECU connected to CAN bus and allows transfer processing of data, which is transmitted from the external diagnosis device and which indicates at least either one of transmission prohibition of periodic transmission data and storage prohibition of a failure code into each ECU by not receiving the periodic transmission data in each ECU, to the CAN buses.

Abstract: A rewriting device of a program rewriting system for vehicles receives a plurality of pieces of rewriting data each including a rewriting program and also receives information of combination suitability determination used for determining whether the combination of the plurality of pieces of rewriting data is suitable or not. The rewriting device then uses the information of combination suitability determination to determine whether the combination of the plurality of pieces of rewriting data is suitable or not. If having determined that the combination is suitable, the rewriting device executes the rewriting of the programs of a plurality of electronic control devices.

Abstract: A rewriting apparatus of a vehicle program rewriting system predicts, on the basis of both a state of a battery at the time of starting rewriting the programs of ECUs and a scheduled process time period of rewiring the programs, a state of the battery after rewriting the programs, and executes rewriting the programs if the predicted state of the battery satisfies a condition on which the vehicle can be restarted.

Abstract: A semiconductor memory device, including: a cell array block including a plurality of memory cells arranged therein; and a controller, wherein the controller controls the semiconductor memory device so that: an operation of reading out data from a second region in the cell array block is initiated before completion of an operation of outputting data read out from a first region in the cell array block; and the data read out from the second region is output successively after the completion of the operation of outputting data read out from the first region.

Abstract: A semiconductor memory device includes a plurality of memory cell arrays each including a plurality of memory cells arranged in a matrix pattern, and a plurality of cell plate lines each being shared by the memory cell arrays, each of the cell plate lines corresponding to each of rows of the memory cells and each of the cell plate lines being connected to the memory cells of a corresponding one of the rows. Each of the memory cell arrays includes a plurality of word lines each of which corresponds to each of the rows of the memory cells in the memory cell array. The number of the memory cells connected to each of the cell plate lines is larger than the number of the memory cells connected to one of the word lines corresponding to the each of the cell plate lines.

Abstract: A syndrome generation section generates a syndrome from input data having d bits of data bits and k bits of parity bits. A syndrome table stores a syndrome pattern indicating that no error has occurred in the input data and syndrome patterns indicating an error position. A comparison section compares the syndrome generated by the syndrome generation section with the syndrome patterns in the syndrome table, outputs a match signal when a syndrome pattern matching the syndrome exists, and outputs a no-match signal when no syndrome pattern matching the syndrome exists. An error correction section corrects the error in the input data based on the match signal from the comparison section.

Abstract: A semiconductor memory device includes a plurality of memory cell arrays each including a plurality of memory cells arranged in a matrix pattern, and a plurality of cell plate lines each being shared by the memory cell arrays, each of the cell plate lines corresponding to each of rows of the memory cells and each of the cell plate lines being connected to the memory cells of a corresponding one of the rows. Each of the memory cell arrays includes a plurality of word lines each of which corresponds to each of the rows of the memory cells in the memory cell array. The number of the memory cells connected to each of the cell plate lines is larger than the number of the memory cells connected to one of the word lines corresponding to the each of the cell plate lines.

Abstract: In rewriting processing of logical sectors, data of the transferred logical sectors are temporarily stored in a memory buffer. When the buffer memory has been full filled with data, the data is written into a flash memory. In rewriting processing for the flash memory including a writing unit (page) having a capacity larger than a minimum writing unit (sector) from outside, the number of executions of the evacuation processing can be reduced and the fast data rewriting can be performed. Thus, it is possible to rationalize the evacuation processing for old data caused in the rewriting in units of sectors and to improve the data rewriting speed.

Abstract: A semiconductor memory device including a ferroelectric memory includes: a nonvolatile memory having higher data retention capability under high temperature than the ferroelectric memory; and a connection circuit for switching between connection and disconnection of the ferroelectric memory and the nonvolatile memory. The ferroelectric memory receives, through the connection circuit, at least part of data which is unique to the device and which has been written into the nonvolatile memory, and retains the received data.

Abstract: A semiconductor memory device, including: a cell array block including a plurality of memory cells arranged therein; and a controller, wherein the controller controls the semiconductor memory device so that: an operation of reading out data from a second region in the cell array block is initiated before completion of an operation of outputting data read out from a first region in the cell array block; and the data read out from the second region is output successively after the completion of the operation of outputting data read out from the first region.

Abstract: A non-volatile storage device comprises a non-volatile memory into which data is written per unit area, and a memory controller for controlling writing of data into the non-volatile memory. The memory controller comprises a first storage section for holding data input from the outside of the device, a first control section for writing data which is held by the first storage section and whose amount corresponds to the unit area, into the non-volatile memory in a unit area-by-unit area basis, and writing data which is held by the first storage section and whose amount is less than the unit area, into a second storage section, and a second control section for writing data held by the second storage section into the non-volatile memory.