Abstract: A printed wiring board includes a dielectric layer, a first and second conductor layer, and a plurality of via conductors. The dielectric layer has first and second opposing surfaces. The first and second conductor layer lie in the first second surfaces of the dielectric layer, respectively. Each via conductor extends through the dielectric layer and connects the first and second conductor layers to each other. Part of the printed wiring board is surrounded with the via conductors and is an overlap between the first conductor layer and the second conductor layer in a transparent plan view. When viewed in plan, the via conductors each have an aspect ratio greater than 1 and a major axis extending in a first direction and a minor axis extending in a second direction. The via conductors include a via conductor whose major axis extends and connects the via conductors arranged in a line.

Abstract: A printed wiring board of the present disclosure that includes a power supply layer and a ground layer. A power supply layer pattern formed in the power supply layer includes a power supply layer electrode and a branch that is a direct-current power feeding path connecting adjacent electromagnetic band gap (EBG) unit cells. A capacitive coupling element including a capacitive coupling element body is disposed to oppose the power supply layer electrode with an interlayer provided therebetween.

Abstract: A printed wiring board of the present disclosure includes a power supply layer and a ground layer. A power supply layer pattern to be formed partially on the power supply layer includes a branch and a power supply layer electrode. The branch is a direct-current power feeding path for connecting adjacent electromagnetic band gap (EBG) unit cells, and the power supply layer electrode is connected through a slit provided along the branch. A capacitive coupling element disposed to oppose the power supply layer electrode with an interlayer being provided therebetween has a structure in which the EBG unit cells are disposed at regular intervals, the EBG unit cells being connected to the branch in the power supply layer pattern through a via.

Abstract: A printed wiring board of the present disclosure includes a power supply layer and a ground layer. A power supply layer pattern to be formed partially on the power supply layer includes a branch and a power supply layer electrode. The branch is a direct-current power feeding path for connecting adjacent electromagnetic band gap (EBG) unit cells, and the power supply layer electrode is connected through a slit provided along the branch. A capacitive coupling element disposed to oppose the power supply layer electrode with an interlayer being provided therebetween has a structure in which the EBG unit cells are disposed at regular intervals, the EBG unit cells being connected to the branch in the power supply layer pattern through a via.

Abstract: A printed wiring board of the present disclosure that includes a power supply layer and a ground layer. A power supply layer pattern formed in the power supply layer includes a power supply layer electrode and a branch that is a direct-current power feeding path connecting adjacent electromagnetic band gap (EBG) unit cells. A capacitive coupling element including a capacitive coupling element body is disposed to oppose the power supply layer electrode with an interlayer provided therebetween.

Abstract: A printed wiring board includes a digital circuit, an analog circuit, and a power supply path that is disposed on an insulating layer between the digital circuit and the analog circuit. A plurality of open stub EBG structures are disposed at an end of a bridge section in a power supply plane. The open stub EBG structure is an open stub state whose one end is connected to the power supply path and other end is in an open state.

Abstract: A printed wiring board includes a digital circuit, an analog circuit, and a power supply path that is disposed on an insulating layer between the digital circuit and the analog circuit. EBG unit cells are disposed on a boundary between the digital circuit and the analog circuit one dimensionally or two dimensionally and periodically, and an interdigital electrode is formed. A magnetic body film is formed over the printed wiring board, partially formed on the EBG unit cells, or formed avoiding the EBG unit cells.

Abstract: A printed wiring board includes a digital circuit, an analog circuit, and a power supply path that is disposed on an insulating layer between the digital circuit and the analog circuit. EBG unit cells are disposed on a boundary between the digital circuit and the analog circuit one dimensionally or two dimensionally and periodically, and an interdigital electrode is formed. A magnetic body film is formed over the printed wiring board, partially formed on the EBG unit cells, or formed avoiding the EBG unit cells.

Abstract: A printed wiring board includes a digital circuit, an analog circuit, and a power supply path that is disposed on an insulating layer between the digital circuit and the analog circuit. A plurality of open stub EBG structures are disposed at an end of a bridge section in a power supply plane. The open stub EBG structure is an open stub state whose one end is connected to the power supply path and other end is in an open state.

Abstract: An information processing system capable of performance measurement by the use of a small amount of mounted hardware. The information processing system having central processors installed therein comprises a control circuit, and a performance measurement validation register for specifying whether a performance measurement function is valid or invalid. In a case where the validity of the measurement function has been specified by the register, the control circuit operates one loop in a duplex configuration as a performance measurement facility. At this time, counter #1-counter #3 are used as counters for totalizing performance information. On the other hand, in a case where the invalidity of the measurement function has been specified, both loops in the duplex configuration are operated as the central processors. At this time, the counter #1-the counter #3 are used as timer counters for controlling buses.

Abstract: A primer coating composition comprising (1) a mixture of more than 50% by weight of aluminum powder and less than 50% by weight of zinc powder, and (2) at least one C.sub.1-4 -alkyl silicate, the weight ratio of (1) to (2) being 60:40 to 95:5. The composition is employed in a coating method which comprises applying a primer dispersion to the surface of a substrate to be coated. The primer disbersion is a dispersion of a mixture of more than 50% by weight of aluminum powder and less than 50% by weight of zinc powder in a solution of at least one organic solvent-soluble C.sub.1-4 -alkyl silicate in an organic solvent. The weight ratio of the metal powder to the alkyl silicate is as indicated. The coating is baked and a finishing powder paint is coated on the resulting primer. The finished coating is then baked.

Abstract: A composition comprising a poly(phenylene sulfide) resin powder and an aluminum oxide powder of colloidal size. The composition is useful as a powder coating composition. The composition exhibits improved adhesion to a substrate, even in hot water.

Abstract: A primer coating composition comprising (1) a mixture of more than 50% by weight of aluminum powder and less than 50% by weight of zinc powder, and (2) at least one C.sub.1-4 -alkyl silicate, the weight ratio of (1) to (2) being 60:40 to 95:5. The composition is especially useful as a primer for polyphenylene sulfide resin paints.