Abstract: A write PLL circuit generates a write clock signal for writing a video signal into a line memory. A readout PLL circuit generates a read clock signal for reading out the video signal stored in the line memory. An inner pincushion distortion correction voltage generation circuit modulates a correction waveform in the horizontal scanning period of time by a correction waveform in the vertical scanning period of time, to generate an inner pincushion distortion correction waveform, and adds a DC correction pulse to the inner pincushion distortion correction waveform and outputs the inner pincushion distortion correction waveform as an inner pincushion distortion correction voltage. A capacitive coupling circuit superimposes the inner pincushion distortion correction voltage on an output voltage of a loop filter of the readout PLL circuit, and feeds the inner pincushion distortion correction voltage to a VCO as a control voltage.

Abstract: In each of sub-fields on each of lines in a plasma display device, it is judged whether or not all of a plurality of discharge cells on the line or the display cells whose number is not less than a predetermined number do not emit light, and at least one of a voltage applied to a scan electrode and a voltage applied to a sustain electrode on the line are kept at predetermined levels when all of the discharge cells or the discharge cells whose number is not less than the predetermined number do not emit light, or a pulse having the same phase as that of a sustain pulse applied to the sustain electrode 13 is periodically applied in place of a sustain pulse applied to the scan electrode 12 corresponding to the line, to decrease a charge or discharge current as well as to reduce the generation of electromagnetic waves.

Abstract: In each of sub-fields on each of lines in a plasma display device, it is judged whether or not all of a plurality of discharge cells on the line or the display cells whose number is not less than a predetermined number do not emit light, and at least one of a voltage applied to a scan electrode and a voltage applied to a sustain electrode on the line are kept at predetermined levels when all of the discharge cells or the discharge cells whose number is not less than the predetermined number do not emit light, or a pulse having the same phase as that of a sustain pulse applied to the sustain electrode 13 is periodically applied in place of a sustain pulse applied to the scan electrode 12 corresponding to the line, to decrease a charge or discharge current as well as to reduce the generation of electromagnetic waves.

Abstract: A write PLL circuit generates a write clock signal for writing a video signal into a line memory. A readout PLL circuit generates a read clock signal for reading out the video signal stored in the line memory. An inner pincushion distortion correction voltage generation circuit modulates a correction waveform in the horizontal scanning period of time by a correction waveform in the vertical scanning period of time, to generate an inner pincushion distortion correction waveform, and adds a DC correction pulse to the inner pincushion distortion correction waveform and outputs the inner pincushion distortion correction waveform as an inner pincushion distortion correction voltage. A capacitive coupling circuit superimposes the inner pincushion distortion correction voltage on an output voltage of a loop filter of the readout PLL circuit, and feeds the inner pincushion distortion correction voltage to a VCO as a control voltage.

Abstract: A primary winding of a transformer is serially connected to a horizontal deflection coil. An amplitude regulating circuit outputs a first correction voltage in response to a voltage generated on a secondary winding of the transformer. A phase regulating circuit regulates the phase of the first correction voltage output from the amplitude regulating circuit and outputs a second correction voltage. An addition circuit adds the second correction voltage to a sawtooth wave voltage generated by a sawtooth wave voltage generation circuit. A correction current output from an amplifier in response to the second correction voltage output from the phase regulating circuit cancels a current component generated on a vertical deflection coil by a horizontal deflection current.