Abstract: A semiconductor integrated circuit includes a buffer which outputs a memory control signal to a terminal coupled to a memory device, a power supply control circuit which controls a supply of a power supply voltage from a power supply line to the buffer based on a power control signal, a pull-up control circuit configured to control a pull-up of the terminal based on a pull-up control signal, and a control signal generating circuit. The control signal generating circuit generates, during an output period, the power control signal to supply the power supply voltage to the buffer, and the pull-up control signal to stop the pull-up of the terminal, and generates, during an idle period, the power control signal to stop the supply of the power supply voltage to the buffer, and the pull-up control signal to perform the pull-up of the terminal.

Abstract: A semiconductor integrated circuit includes a buffer which outputs a memory control signal to a terminal coupled to a memory device, a power supply control circuit which controls a supply of a power supply voltage from a power supply line to the buffer based on a power control signal, a pull-up control circuit configured to control a pull-up of the terminal based on a pull-up control signal, and a control signal generating circuit. The control signal generating circuit generates, during an output period, the power control signal to supply the power supply voltage to the buffer, and the pull-up control signal to stop the pull-up of the terminal, and generates, during an idle period, the power control signal to stop the supply of the power supply voltage to the buffer, and the pull-up control signal to perform the pull-up of the terminal.

Abstract: A variable delay circuit includes at least one first delay circuit and a second delay circuit. The first delay circuit includes multiple first delay elements connected in series and is configured to output a delay signal from a first stage first delay element that is a first stage of the first delay circuit. The second delay circuit includes at least one second delay element and multiple third delay elements connected in series. The second delay circuit is configured to output a delay signal from a first stage second delay element that is a first stage of the second delay circuit. The first stage first delay element and the first stage second delay element are connected in series. A delay signal obtained by delaying an input signal received at one circuit among the first delay circuit and the second delay circuit for a predetermined time duration is output from another circuit.

Abstract: A variable delay circuit includes at least one first delay circuit and a second delay circuit. The first delay circuit includes multiple first delay elements connected in series and is configured to output a delay signal from a first stage first delay element that is a first stage of the first delay circuit. The second delay circuit includes at least one second delay element and multiple third delay elements connected in series. The second delay circuit is configured to output a delay signal from a first stage second delay element that is a first stage of the second delay circuit. The first stage first delay element and the first stage second delay element are connected in series. A delay signal obtained by delaying an input signal received at one circuit among the first delay circuit and the second delay circuit for a predetermined time duration is output from another circuit.

Abstract: A semiconductor integrated circuit includes a buffer which outputs a memory control signal to a terminal coupled to a memory device, a power supply control circuit which controls a supply of a power supply voltage from a power supply line to the buffer based on a power control signal, a pull-up control circuit configured to control a pull-up of the terminal based on a pull-up control signal, and a control signal generating circuit. The control signal generating circuit generates, during an output period, the power control signal to supply the power supply voltage to the buffer, and the pull-up control signal to stop the pull-up of the terminal, and generates, during an idle period, the power control signal to stop the supply of the power supply voltage to the buffer, and the pull-up control signal to perform the pull-up of the terminal.

Abstract: When a first module and a second module of a plurality of modules 110 to 150 perform authentication processing through short range communication, the first module detects remaining capacity of its own battery 101. When the remaining capacity surpasses a predetermined level, electric power for use in performing authentication operation is supplied to the second module. The plurality of modules, perform authentication processing through short range communication as mentioned above. In addition, individual function units of the respective modules are activated, whereby one function is implemented as a whole. Such a portable device can be made operable on electrical power of a battery for a long hour without impairing convenience of the device.

Abstract: A shared memory system provides an access monitoring mechanism 112 with a definition for taking clusters for motion picture attributes as pieces of cluster memory 1 and 2. When a DSP (2) 104 makes access to memory while adding attribute information about an image to the access, the access monitoring mechanism 112 outputs to a cluster memory space selector 119 control information 131 that permits making of access to the pieces of cluster memory 1 and 2. Based on the control information 131, the cluster memory space selector 119 sorts access from the DSP (2) 104 to the cluster memory 1 or 2. The same also applies to access from a GPU 105. A plurality of master processors share shared memory 110 divided into a plurality of clusters 111, thereby holding coherence of cache memory.

Abstract: When a first module and a second module of a plurality of modules 110 to 150 perform authentication processing through short range communication, the first module detects remaining capacity of its own battery 101. When the remaining capacity surpasses a predetermined level, electric power for use in performing authentication operation is supplied to the second module. The plurality of modules, perform authentication processing through short range communication as mentioned above. In addition, individual function units of the respective modules are activated, whereby one function is implemented as a whole. Such a portable device can be made operable on electrical power of a battery for a long hour without impairing convenience of the device.

Abstract: A semiconductor device connected to other semiconductor device, includes a control portion which controls a drive capability for the other semiconductor device based on control information for the other semiconductor device.

Abstract: A semiconductor device connected to other semiconductor device, includes a control portion which controls a drive capability for the other semiconductor device based on control information for the other semiconductor device.

Abstract: A mobile communication system and communication line switching method in the mobile communication system capable of selecting the communication line, if there is a communication line with a better condition than the current communication line. If there is a communication-possible range with a better condition than a communication-possible range of a communication carrier that currently provides a communication line to mobile telephone 102, a communication carrier that provides a communication line to the communication-possible range is selected to enable communication under management of this communication carrier. By this means, it is possible to select a carrier or service area with a better condition than the currently used carrier or service area in terms of usage rate or service and achieve improvement of user convenience.