Patents by Inventor Masanori YOFUNE

Masanori YOFUNE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11013032
    Abstract: A wireless communication device includes a processor. The processor estimates a quality of a received signal that is transmitted from a source device. The processor determines a communication parameter for a next communication transaction based on an evaluation value that indicates a result of subtracting a second value from a first value, the first value being determined based on a coding rate and a data length of a data signal received from the source device, the second value being determined based on the data length, a modulation scheme and a quality of the data signal. The processor reports the communication parameter to the source device.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: May 18, 2021
    Assignee: MOBILE TECHNO CORP.
    Inventors: Masanori Yofune, Masayuki Suto, Yasuharu Amezawa
  • Patent number: 10608787
    Abstract: A wireless communication system, in which a redundancy bit is transmitted from a first communication device to a second communication device when the second communication device fails to decode the encoded bits, includes a processor. The processor selects communication patterns that respectively satisfy a requested quality, calculates, for each of the selected communication patterns, a transmission data length that indicates a length of the redundancy bit, calculates, for each of the selected communication patterns, a transmission latency between the first communication device and the second communication device based on the calculated transmission data length, and generates a retransmission parameter corresponding to a communication pattern with lowest transmission latency among the selected communication patterns.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: March 31, 2020
    Assignee: Mobile Techno Corp.
    Inventors: Satoshi Sonobe, Masanori Yofune, Atsuhiko Sugitani
  • Publication number: 20200084801
    Abstract: A wireless communication device includes a processor. The processor estimates a quality of a received signal that is transmitted from a source device. The processor determines a communication parameter for a next communication transaction based on an evaluation value that indicates a result of subtracting a second value from a first value, the first value being determined based on a coding rate and a data length of a data signal received from the source device, the second value being determined based on the data length, a modulation scheme and a quality of the data signal. The processor reports the communication parameter to the source device.
    Type: Application
    Filed: July 30, 2019
    Publication date: March 12, 2020
    Applicant: Mobile Techno Corp.
    Inventors: Masanori YOFUNE, Masayuki SUTO, Yasuharu AMEZAWA
  • Publication number: 20190068326
    Abstract: A wireless communication system, in which a redundancy bit is transmitted from a first communication device to a second communication device when the second communication device fails to decode the encoded bits, includes a processor. The processor selects communication patterns that respectively satisfy a requested quality, calculates, for each of the selected communication patterns, a transmission data length that indicates a length of the redundancy bit, calculates, for each of the selected communication patterns, a transmission latency between the first communication device and the second communication device based on the calculated transmission data length, and generates a retransmission parameter corresponding to a communication pattern with lowest transmission latency among the selected communication patterns.
    Type: Application
    Filed: February 8, 2018
    Publication date: February 28, 2019
    Inventors: Satoshi Sonobe, Masanori Yofune, Atsuhiko Sugitani
  • Publication number: 20170359085
    Abstract: A coding apparatus includes a check matrix, a calculator, a selector, and a synthesizer. The check matrix includes a parity operation matrix including a matrix along a diagonal, a circulant matrix positioned one row and a predetermined number of rows below the diagonal, and an information operation matrix. The calculator sets, in response to an input of a bit sequence of a message, every pattern of initial values to a less-significant bit sequence of parity bits corresponding to the number of the predetermined rows, and calculates parity bit sequences for the respective patterns of the initial values. The selector selects a parity bit sequence corresponding to one of the patterns of initial values when the less-significant bit sequence of the parity bit sequence matches the pattern of initial values. The synthesizer concatenates the selected parity bit sequence to the bit sequence of the message, and outputs the resultant code word.
    Type: Application
    Filed: May 26, 2017
    Publication date: December 14, 2017
    Applicants: FUJITSU LIMITED, Mobile Techno Corp.
    Inventors: Taizo MAEDA, Yohei KOGANEl, Masanori YOFUNE, Cong LI