Abstract: A reference clock signal oscillator generates a reference clock signal. A first programmable counter performs frequency dividing on the reference clock signal and outputs a reference signal resulting-from the frequency dividing. A voltage controlled oscillator generates an output clock signal, the frequency of which is controllable by input voltage control. A second programmable counter performs frequency dividing on the output clock signal and outputs a feedback signal resulting from the frequency dividing. A phase comparator compares the reference signal and the feedback signal, and outputs a phase difference signal which is based on the phase difference between the phases of the reference signal and the feedback signal. A driving circuit includes a charge pump and a loop filter and generates a signal to be applied to the voltage controlled oscillator based on the phase difference signal and performs filtering on the signal to be applied to the voltage controlled oscillator.