Patents by Inventor Masao Iriguchi
Masao Iriguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11888494Abstract: A semiconductor circuit includes: an analog circuit that inputs a measured signal; and a digital circuit that outputs a digital output signal. The analog circuit includes: a correction element group including one or more correction elements each for correcting an offset that is an amount of shift caused by a variation in characteristics of the analog circuit to occur in a path for transmitting the measured signal; and a test element group including one or more test elements for testing the one or more correction elements. The digital circuit tests the correction element group using the test element group.Type: GrantFiled: February 25, 2022Date of Patent: January 30, 2024Assignee: Nuvoton Technology Corporation JapanInventors: Masao Iriguchi, Yosuke Goto
-
Publication number: 20220182066Abstract: A semiconductor circuit includes: an analog circuit that inputs a measured signal; and a digital circuit that outputs a digital output signal. The analog circuit includes: a correction element group including one or more correction elements each for correcting an offset that is an amount of shift caused by a variation in characteristics of the analog circuit to occur in a path for transmitting the measured signal; and a test element group including one or more test elements for testing the one or more correction elements. The digital circuit tests the correction element group using the test element group.Type: ApplicationFiled: February 25, 2022Publication date: June 9, 2022Inventors: Masao IRIGUCHI, Yosuke GOTO
-
Patent number: 10816613Abstract: A magnetic sensor circuit includes a first type electromagnetic conversion element which supplies antiphase signals corresponding to the intensity of a magnetic field in a first direction, a second type electromagnetic conversion element which supplies antiphase signals corresponding to the intensity of a magnetic field in a second direction, a switch circuit which controls a current supplied from a current source to the first and the second type electromagnetic conversion elements, and a common mode feedback circuit which determines a midpoint voltage between the first and the second type electromagnetic conversion elements. The common mode feedback circuit performs a feedback operation to thereby set an output common voltage of the first type electromagnetic conversion element higher than the preset reference voltage and set an output common voltage of the second type electromagnetic conversion element lower than the preset reference voltage.Type: GrantFiled: July 11, 2018Date of Patent: October 27, 2020Assignee: ABLIC Inc.Inventor: Masao Iriguchi
-
Patent number: 10578683Abstract: A magnetic sensor circuit includes a first magnetic detection portion and a second magnetic detection portion. The first magnetic detection portion has: output terminals for signals corresponding to strength of a magnetic field in a first direction; a positive terminal to which a drive current of the signals is supplied; and a negative terminal from which the drive current flows out. The second magnetic detection portion has: output terminals for signals corresponding to strength of a magnetic field in a second direction; and a positive terminal to which the drive current of the signals is supplied. The positive terminal of the first magnetic detection portion, the negative terminal of the first magnetic detection portion, and the positive terminal of the second magnetic detection portion are connected in series with respect to a path of the drive current of the first signals supplied from a power supply.Type: GrantFiled: March 9, 2018Date of Patent: March 3, 2020Assignee: ABLIC INC.Inventor: Masao Iriguchi
-
Publication number: 20190025384Abstract: A magnetic sensor circuit includes a first type electromagnetic conversion element which supplies antiphase signals corresponding to the intensity of a magnetic field in a first direction, a second type electromagnetic conversion element which supplies antiphase signals corresponding to the intensity of a magnetic field in a second direction, a switch circuit which controls a current supplied from a current source to the first and the second type electromagnetic conversion elements, and a common mode feedback circuit which determines a midpoint voltage between the first and the second type electromagnetic conversion elements. The common mode feedback circuit performs a feedback operation to thereby set an output common voltage of the first type electromagnetic conversion element higher than the preset reference voltage and set an output common voltage of the second type electromagnetic conversion element lower than the preset reference voltage.Type: ApplicationFiled: July 11, 2018Publication date: January 24, 2019Inventor: Masao IRIGUCHI
-
Publication number: 20180313909Abstract: A magnetic sensor circuit includes a magnetoelectric conversion element having a plurality of terminals including at least a voltage supply terminal to which a drive voltage is applied, and a ground terminal, a switch circuit configured to output signals provided from any two of the terminals as a differential voltage, and a first resistor having a first temperature characteristic being a prescribed temperature characteristic. A current supplied from the voltage supply terminal flows to the ground terminal through the first resistor and the magnetoelectric conversion element.Type: ApplicationFiled: April 27, 2018Publication date: November 1, 2018Inventor: Masao IRIGUCHI
-
Publication number: 20180259598Abstract: A magnetic sensor circuit includes a first magnetic detection portion and a second magnetic detection portion. The first magnetic detection portion has: output terminals for signals corresponding to strength of a magnetic field in a first direction; a positive terminal to which a drive current of the signals is supplied; and a negative terminal from which the drive current flows out. The second magnetic detection portion has: output terminals for signals corresponding to strength of a magnetic field in a second direction; and a positive terminal to which the drive current of the signals is supplied. The positive terminal of the first magnetic detection portion, the negative terminal of the first magnetic detection portion, and the positive terminal of the second magnetic detection portion are connected in series with respect to a path of the drive current of the first signals supplied from a power supply.Type: ApplicationFiled: March 9, 2018Publication date: September 13, 2018Inventor: Masao IRIGUCHI
-
Patent number: 9746531Abstract: To provide a magnetic sensor circuit which does not output spike-like voltage errors to a signal processing circuit. A magnetic sensor circuit is provided which is configured so as to output an output signal to a signal processing circuit through a plurality of hall elements driven by a first switch circuit and a second switch circuit controlled by a second control circuit and in which the first switch circuit controls timings at which spikes occur in the output signal of each of the hall elements in such a manner that the timings are not the same, and the second switch circuit selects and outputs an output signal having a period of a timing free of the occurrence of a spike.Type: GrantFiled: March 2, 2016Date of Patent: August 29, 2017Assignee: SII SEMICONDUCTOR CORPORATIONInventor: Masao Iriguchi
-
Publication number: 20160259017Abstract: To provide a magnetic sensor circuit which does not output spike-like voltage errors to a signal processing circuit. A magnetic sensor circuit is provided which is configured so as to output an output signal to a signal processing circuit through a plurality of hall elements driven by a first switch circuit and a second switch circuit controlled by a second control circuit and in which the first switch circuit controls timings at which spikes occur in the output signal of each of the hall elements in such a manner that the timings are not the same, and the second switch circuit selects and outputs an output signal having a period of a timing free of the occurrence of a spike.Type: ApplicationFiled: March 2, 2016Publication date: September 8, 2016Inventor: Masao IRIGUCHI
-
Patent number: 8957794Abstract: An ADC includes sampling means for sampling an input voltage signal, comparator(s) for receiving the sampled signal, and a DAC including circuitry for generating a search signal approximating the input signal and a calibration signal. The search signal and the calibration signal are to be applied to a comparator. The ADC also includes a search logic block for receiving a comparator output signal, for providing input to the DAC for generating the search signal, and for producing a digital output signal. Further, the ADC includes a calibration logic block for producing a control signal to control the circuitry of the DAC and including processing means for observing the output signal, for comparing the output signal with a desired output, and for compensating analog non-idealities of the ADC. The DAC circuitry is adapted for generating the calibration signal in accordance with the control signal and with the sampled input signal.Type: GrantFiled: February 14, 2013Date of Patent: February 17, 2015Assignees: IMEC, Renesas Electronics CorporationInventors: Bob Verbruggen, Masao Iriguchi, Jan Craninckx
-
Patent number: 8614774Abstract: In an image display device where a lenticular lens, a display panel, and a light source are provided in order from a viewer side, when cylindrical lenses of the lenticular lens are arrayed in a horizontal direction, in first-viewpoint pixels and second-viewpoint pixels of the display panel, openings whose sides which intersect with straight lines in the horizontal direction are not parallel to a vertical direction are formed. And, a shape of the openings of a pair of pixels mutually adjacent in the vertical direction is made line-symmetric with respect to edges of the pixels extending in the horizontal direction as an axis.Type: GrantFiled: January 17, 2013Date of Patent: December 24, 2013Assignee: NLT Technologies, Ltd.Inventors: Shin-ichi Uehara, Masao Iriguchi, Naoyasu Ikeda, Nobuaki Takanashi
-
Patent number: 8379178Abstract: In an image display device where a lenticular lens, a display panel, and a light source are provided in order from a viewer side, when cylindrical lenses of the lenticular lens are arrayed in a horizontal direction, in first-viewpoint pixels and second-viewpoint pixels of the display panel, openings whose sides which intersect with straight lines in the horizontal direction are not parallel to a vertical direction are formed. And, a shape of the openings of a pair of pixels mutually adjacent in the vertical direction is made line-symmetric with respect to edges of the pixels extending in the horizontal direction as an axis.Type: GrantFiled: May 6, 2011Date of Patent: February 19, 2013Assignee: NLT Technologies, Ltd.Inventors: Shin-ichi Uehara, Masao Iriguchi, Naoyasu Ikeda, Nobuaki Takanashi
-
Patent number: 8199040Abstract: A ?? analog-to-digital converter includes a previous stage amplifier circuit which amplifies an input signal, a conversion circuit which converts an analog signal into a digital signal, where the analog signal is output from the previous stage amplifier circuit, an input node provided in the previous stage amplifier circuit, a plurality of capacitors provided in the conversion circuit, a first amplifier and a second amplifier, and a path switching circuit which connects the first amplifier to the input node in a first mode and connects the first amplifier to the plurality of capacitors in a second mode, where the first mode is for sampling the analog signal and the second mode is for performing an integration operation. The first amplifier forms the previous stage amplifier circuit in the first mode, and forms an integrator which carries out the integration operation performed in the conversion circuit in the second mode.Type: GrantFiled: March 23, 2011Date of Patent: June 12, 2012Assignee: Renesas Electronics CorporationInventor: Masao Iriguchi
-
Patent number: 8199173Abstract: In a liquid crystal display apparatus, one display pixel has a total of six sub pixels, namely, a red sub pixel for a left eye, a green sub pixel for the left eye, a blue sub pixel for the left eye, a red sub pixel for a right eye, a green sub pixel for the right eye, and a blue sub pixel for the right eye. Those sub pixels are arranged in a square area, two in a horizontal direction along which gate lines extend, three in a vertical direction along which data lines extend. The polarity of the data lines with respect to a potential of a common electrode is inverted every time three gate lines are scanned and every frame.Type: GrantFiled: September 28, 2010Date of Patent: June 12, 2012Assignee: NLT Technologies, Ltd.Inventors: Masao Iriguchi, Naoyasu Ikeda, Shin-ichi Uehara
-
Publication number: 20110205623Abstract: In an image display device where a lenticular lens, a display panel, and a light source are provided in order from a viewer side, when cylindrical lenses of the lenticular lens are arrayed in a horizontal direction, in first-viewpoint pixels and second-viewpoint pixels of the display panel, openings whose sides which intersect with straight lines in the horizontal direction are not parallel to a vertical direction are formed. And, a shape of the openings of a pair of pixels mutually adjacent in the vertical direction is made line-symmetric with respect to edges of the pixels extending in the horizontal direction as an axis.Type: ApplicationFiled: May 6, 2011Publication date: August 25, 2011Applicant: NEC LCD TECHNOLOGIES, LTD.Inventors: Shin-ichi UEHARA, Masao IRIGUCHI, Naoyasu IKEDA, Nobuaki TAKANASHI
-
Publication number: 20110169676Abstract: A ?? analog-to-digital converter includes a previous stage amplifier circuit which amplifies an input signal, a conversion circuit which converts an analog signal into a digital signal, where the analog signal is output from the previous stage amplifier circuit, an input node provided in the previous stage amplifier circuit, a plurality of capacitors provided in the conversion circuit, a first amplifier and a second amplifier, and a path switching circuit which connects the first amplifier to the input node in a first mode and connects the first amplifier to the plurality of capacitors in a second mode, where the first mode is for sampling the analog signal and the second mode is for performing an integration operation. The first amplifier forms the previous stage amplifier circuit in the first mode, and forms an integrator which carries out the integration operation performed in the conversion circuit in the second mode.Type: ApplicationFiled: March 23, 2011Publication date: July 14, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Masao IRIGUCHI
-
Patent number: 7965365Abstract: In an image display device where a lenticular lens, a display panel, and a light source are provided in order from a viewer side, when cylindrical lenses of the lenticular lens are arrayed in a horizontal direction, in first-viewpoint pixels and second-viewpoint pixels of the display panel, openings whose sides which intersect with straight lines in the horizontal direction are not parallel to a vertical direction are formed. And, a shape of the openings of a pair of pixels mutually adjacent in the vertical direction is made line-symmetric with respect to edges of the pixels extending in the horizontal direction as an axis.Type: GrantFiled: June 23, 2005Date of Patent: June 21, 2011Assignee: NEC LCD Technologies, LtdInventors: Shin-ichi Uehara, Masao Iriguchi, Naoyasu Ikeda, Nobuaki Takanashi
-
Patent number: 7936329Abstract: Disclosed is a display device including display unit, a column driver, a delay control circuit, an output switch control circuit, and a display controller. The display unit includes a plurality of pixel electrodes arranged at intersections between a plurality of data lines and a plurality of scan lines in a matrix form and TFTs. One of a drain and a source of each of the TFTs is connected to a corresponding one of the pixel electrodes. The other one of the drain and the source of each of the TFTs is connected to a corresponding one of the data lines, and a gate of each of the TFTs is connected to a corresponding one of the scan lines. The scan driver supplies a scan signal to each of the scan line in a preset scan cycle.Type: GrantFiled: April 26, 2006Date of Patent: May 3, 2011Assignee: NEC CorporationInventors: Masao Iriguchi, Hiroshi Tsuchi
-
Patent number: 7924192Abstract: A ?? analog-to-digital converter includes a previous stage amplifier circuit which amplifies an input signal, a conversion circuit which converts an analog signal into a digital signal, where the analog signal is output from the previous stage amplifier circuit, an input node provided in the previous stage amplifier circuit, a plurality of capacitors provided in the conversion circuit, a first amplifier and a second amplifier, and a path switching circuit which connects the first amplifier to the input node in a first mode and connects the first amplifier to the plurality of capacitors in a second mode, where the first mode is for sampling the analog signal and the second mode is for performing an integration operation. The first amplifier forms the previous stage amplifier circuit in the first mode, and forms an integrator which carries out the integration operation performed in the conversion circuit in the second mode.Type: GrantFiled: August 27, 2009Date of Patent: April 12, 2011Assignee: Renesas Electronics CorporationInventor: Masao Iriguchi
-
Publication number: 20110012893Abstract: In a liquid crystal display apparatus, one display pixel has a total of six sub pixels, namely, a red sub pixel for a left eye, a green sub pixel for the left eye, a blue sub pixel for the left eye, a red sub pixel for a right eye, a green sub pixel for the right eye, and a blue sub pixel for the right eye. Those sub pixels are arranged in a square area, two in a horizontal direction along which gate lines extend, three in a vertical direction along which data lines extend. The polarity of the data lines with respect to a potential of a common electrode is inverted every time three gate lines are scanned and every frame.Type: ApplicationFiled: September 28, 2010Publication date: January 20, 2011Applicant: NEC CORPORATIONInventors: Masao Iriguchi, Naoyasu Ikeda, Shin-ichi Uehara