Abstract: A signal line drive circuit according to the present invention has: a latch circuit which latches digital pixel data; a D/A converter which converts a latch output from the latch circuit into an analog video signal; an AMP which amplifies the analog video signal converted by the D/A converter; and a signal selection circuit which selects a signal line to which the analog video signal amplified by the AMP is supplied. The AMP has: an odd number of inverters which are cascade-connected; capacitor elements which are respectively connected between stages of the inverters and between an input terminal of the inverter on a first stage and an output terminal of the inverter on a last stage; a first power supply line which supplies a power supply voltage to the inverter on the first stage; and a second power supply line which supplies a power supply voltage to inverters other than the inverter on the first stage.

Abstract: A liquid crystal display according to one embodiment of the present invention, comprising: signal lines and scanning lines arranged in first and second directions on an insulation substrate; display elements formed in vicinity of cross points of the signal lines and scanning lines; liquid crystal capacitors and auxiliary capacitors which accumulate electric charge in accordance with voltages of the signal lines via said display elements; a signal line drive circuit which drives the signal lines; a scanning line drive circuit which drives the scanning lines; auxiliary capacitor power supply lines arranged in the first direction, to which one ends of said auxiliary capacitors arranged in the second direction are commonly connected; and auxiliary capacitor power supply line voltage control circuits which control voltages of said auxiliary capacitor power supply lines in sync with a cycle which drives said liquid crystal capacitors and said auxiliary capacitors by polarity reverse, wherein said auxiliary capacito

Abstract: In order to restrict variations of an output voltage of a DC—DC conversion circuit using TFTs, in a boost-type, a second n-ch TFT N2 and a second p-ch TFT P2 are newly provided. With regard to the second n-ch TFT N2, a gate thereof is connected to a second capacitor C2, a source thereof is connected to a first reference voltage source YVDD, and a drain thereof is connected to a first capacitor C1. With regard to the second p-ch TFT P2, a gate thereof is connected to the second capacitor C2, a source thereof is connected to a third capacitor C3, and a drain thereof is connected to the first capacitor C1. Thus, a voltage at the first capacitor C1 stops being influenced by the variations of a threshold voltage between a source and drain of a first diode D1.

Abstract: A signal line drive circuit according to the present invention has: a latch circuit which latches digital pixel data; a D/A converter which converts a latch output from the latch circuit into an analog video signal; an AMP which amplifies the analog video signal converted by the D/A converter; and a signal selection circuit which selects a signal line to which the analog video signal amplified by the AMP is supplied. The AMP has: an odd number of inverters which are cascade-connected; capacitor elements which are respectively connected between stages of the inverters and between an input terminal of the inverter on a first stage and an output terminal of the inverter on a last stage; a first power supply line which supplies a power supply voltage to the inverter on the first stage; and a second power supply line which supplies a power supply voltage to inverters other than the inverter on the first stage.

Abstract: A signal line drive circuit according to the present invention has: a latch circuit which latches digital pixel data; a D/A converter which converts a latch output from the latch circuit into an analog video signal; an AMP which amplifies the analog video signal converted by the D/A converter; and a signal selection circuit which selects a signal line to which the analog video signal amplified by the AMP is supplied. The AMP has: an odd number of inverters which are cascade-connected; capacitor elements which are respectively connected between stages of the inverters and between an input terminal of the inverter on a first stage and an output terminal of the inverter on a last stage; a first power supply line which supplies a power supply voltage to the inverter on the first stage; and a second power supply line which supplies a power supply voltage to inverters other than the inverter on the first stage.

Abstract: In order to restrict variations of an output voltage of a DC-DC conversion circuit using TFTs, in a boost-type, a second n-ch TFT N2 and a second p-ch TFT P2 are newly provided. With regard to the second n-ch TFT N2, a gate thereof is connected to a second capacitor C2, a source thereof is connected to a first reference voltage source YVDD, and a drain thereof is connected to a first capacitor C1. With regard to the second p-ch TFT P2, a gate thereof is connected to the second capacitor C2, a source thereof is connected to a third capacitor C3, and a drain thereof is connected to the first capacitor C1. Thus, a voltage at the first capacitor C1 stops being influenced by the variations of a threshold voltage between a source and drain of a first diode D1.

Abstract: A liquid crystal display according to one embodiment of the present invention, comprising: signal lines and scanning lines arranged in first and second directions on an insulation substrate; display elements formed in vicinity of cross points of the signal lines and scanning lines; liquid crystal capacitors and auxiliary capacitors which accumulate electric charge in accordance with voltages of the signal lines via said display elements; a signal line drive circuit which drives the signal lines; a scanning line drive circuit which drives the scanning lines; auxiliary capacitor power supply lines arranged in the first direction, to which one ends of said auxiliary capacitors arranged in the second direction are commonly connected; and auxiliary capacitor power supply line voltage control circuits which control voltages of said auxiliary capacitor power supply lines in sync with a cycle which drives said liquid crystal capacitors and said auxiliary capacitors by polarity reverse, wherein said auxiliary capacito

Abstract: A digital-analog converting circuit capable of shortening time necessary to digital-analog conversion. The converting circuit includes first switching circuits for turning on/off in accordance with a digital pixel signal, second switching circuits connected to the first switching circuit, first through third capacitors, and third through seventh switching circuits. Electric charges corresponding to the digital pixel signal are accumulated in the second capacitors. When the accumulation of the electric charges is completed, the switching circuit is turned on in order to transfer the accumulated electric charges into the third capacitor. Because of this, during an OFF period of the switching circuit, the third capacitor can hold the electric charge in accordance with the pixel data.

Abstract: A driving circuit of a display device like liquid crystal display, which is small in circuit size, ensures good quality images, and can freely change the display gradation, is configured to execute digital-analog conversion by reallocating charges between a primary-side capacitor and a secondary-side capacitor and includes a plurality of such capacitors in the primary side or the secondary side to enable both quick conversion and reliable potential output to signal lines. Also in an output circuit, output of signal potentials not affected by fluctuation of properties of TFT and inverters can be realized.

Abstract: A signal line drive circuit according to the present invention has: a latch circuit which latches digital pixel data; a D/A converter which converts a latch output from the latch circuit into an analog video signal; an AMP which amplifies the analog video signal converted by the D/A converter; and a signal selection circuit which selects a signal line to which the analog video signal amplified by the AMP is supplied. The AMP has: an odd number of inverters which are cascade-connected; capacitor elements which are respectively connected between stages of the inverters and between an input terminal of the inverter on a first stage and an output terminal of the inverter on a last stage; a first power supply line which supplies a power supply voltage to the inverter on the first stage; and a second power supply line which supplies a power supply voltage to inverters other than the inverter on the first stage.

Abstract: The present invention provides a digital-analog converting circuit capable of shortening time necessary to digital-analog conversion.

Abstract: A inverting amplifier circuit 10 for controlling the voltage of the signal line S is provided in a load drive circuit 11. Before the inverting amplifier circuit 10 controls the voltage of the signal line S, the voltage of each inverter INV1 to INV3 constituting the inverting amplifier circuit 10 is set at the voltage substantially equal to each threshold voltage thereof. As a result, even when the threshold voltages of the inverters INV1 to INV3 vary, it is possible that this would not exert any influence on the voltage of the signal line S. Therefore, it is possible to provide the load drive circuit 11 not to be affected by the variation of the characteristic of the inverting amplifier circuit 10.

Abstract: A miniature reference electrode with improved stability and durability formed of a miniature silver/silver chloride reference electrode with high stability and general applicability as a reference electrode. The miniature reference electrode includes, on electrode substrate, a thin-film backbone metal pattern and a thin-film silver pattern formed in electrical contact with a portion of the thin-film backbone metal pattern. A silver chloride layer is set on a portion of the thin-film silver pattern. The silver chloride layer is in contact with a portion of thin-film electrolyte layer via hydrophobic thin-film insulating layer. The thin-film electrolyte layer is impregnated with a saturated solution of potassium chloride for making contact to the outside via a thin-film liquid junction pattern. When in use, the thin-film liquid junction pattern (31) is impregnated with the electrolyte, while its end portion is recessed in an aqueous solution.

Abstract: Arrangement of connection points of sampling switches to video bus lines within a signal line drive circuit 200 is improved such that connection points of video buses (SVn1 to SVn6) supplied with positive-polarity video signals relative to a predetermined reference potential and video buses (SVp1 to SVp6) supplied with negative-polarity video signals to analog switches (SWn11 to SWn22 and SWp11 to SWp22) make substantially symmetric patterns in the extending direction of the video buses. Since the sum of lengths of connection wirings belonging to a switch pair and their total resistance value becomes substantially equal in all switch pairs, the effective vales of shift amounts in signal line potentials are substantially flattened. Therefore, here is provided a drive circuit built-in liquid crystal display device realizing a good imaging quality removing noise such as stripe-shaped imaging defects which may occur when video signals are supplied to analog switches through a plurality of video buses.

Abstract: Arrangement of connection points of sampling switches to video bus lines within a signal line drive circuit 200 is improved such that connection points of video buses (SVn1 to SVn6) supplied with positive-polarity video signals relative to a predetermined reference potential and video buses (SVp1 to SVp6) supplied with negative-polarity video signals to analog switches (SWn11 to SWn22 and SWp11 to SWp22) make substantially symmetric patterns in the extending direction of the video buses. Since the sum of lengths of connection wirings belonging to a switch pair and their total resistance value becomes substantially equal in all switch pairs, the effective vales of shift amounts in signal line potentials are substantially flattened. Therefore, here is provided a drive circuit built-in liquid crystal display device realizing a good imaging quality removing noise such as stripe-shaped imaging defects which may occur when video signals are supplied to analog switches through a plurality of video buses.

Abstract: Buffer circuits and analogue switches are disposed closer to a display region than video busses. A timing signal generator circuit provides the buffer circuits with a timing signal. The analogue switches supply video signals from the video busses to signal lines in the display region in response to the timing signal. Parasitic capacitance coupled to the video busses is reduced so that bandwidth characteristics of the busses can be improved and a good display can be also obtained.

Abstract: A flat-panel display device includes a display panel plate, a plurality of display pixels arrayed in a matrix on the display panel plate, a plurality of signal lines formed on the display panel plate along columns of the display pixels, a scanning line driving circuit formed on the display panel plate, for sequentially and periodically selecting rows of the display pixels to connect the display pixels of a selected row to the signal lines, and a signal line driver circuit formed on the display panel plate for driving the display pixels of a selected row via the signal lines.