Patents by Inventor Masao Mashita

Masao Mashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6333516
    Abstract: An inverter comprising four quantum dot cells. When the quantum dot cells are arranged in 9 o'clock direction, 12 o'clock direction and 3 o'clock direction, the quantum dot cell is arranged in 6 o'clock direction.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: December 25, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Riichi Katoh, Tetsufumi Tanamoto, Francis Minoru Saba, Yujiro Naruse, Shigeki Takahashi, Masao Mashita
  • Patent number: 5895938
    Abstract: Disclosed is a semiconductor device comprising a semiconductor BCN compound layer and a metallic BCN compound layer and/or an insulating BCN compound layer, wherein the semiconductor BCN compound layer and the metallic BCN compound layer and/or insulating BCN compound layer are stacked one upon the other.
    Type: Grant
    Filed: February 12, 1997
    Date of Patent: April 20, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Miyoko Watanabe, Koichi Mizushima, Satoshi Itoh, Masao Mashita
  • Patent number: 5425811
    Abstract: An apparatus for forming a II-VI Group compound thin film containing nitrogen as an impurity, on a substrate, comprises a container for holding a substrate, a vapor source for supplying Zn vapor on a surface of the substrate, a vapor source for supplying Se vapor on the surface of the substrate, and a discharge tube into which a nitrogen gas is introduced, having three-divided internal portions, a high-pressure portion, a middle-pressure portion, and a low-pressure portion from the gas introduction side, and supplying excitation species derived from discharge plasma generated in the low-pressure portion onto the surface of the substrate. Zn vapor and Se vapor are alternately supplied, and supply of nitrogen excitation species is performed in synchronous with supply of Zn vapor.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: June 20, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masao Mashita
  • Patent number: 5300185
    Abstract: Disclosed is a method of efficiently manufacturing a III-V group compound semiconductor that carbon mixing is reduced, wherein a compound represented by the formula (1) or (2) is used as a V group source: ##STR1## wherein X represents a V group element, n represents integer of 1 to 3, and Y represents electron-releasing group bonded to a position selected from 2-, 4-, and 6-positions, ##STR2## wherein X represents a V group element, m represents an integer of 1 or 2, and Y represents electron-releasing group bonded to a position selected from 2- and 4-positions.
    Type: Grant
    Filed: March 27, 1992
    Date of Patent: April 5, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisao Hori, Yoshito Kawakyu, Hironori Ishikawa, Masao Mashita
  • Patent number: 5229319
    Abstract: Disclosed is a method of selective chemical vapor deposition for selectively forming thin films of a semiconductor, dielectric or metal on a semiconductor by providing a mask of SiO.sub.2 having a plurality of openings in various forms on the substrate, wherein a trimethyl gallium (TMG) gas as a Group III material, 10% hydrogen-based arsine (AsH.sub.3) gas as a Group V material, and 500 ppm hydrogen-based disilane (Si.sub.2 H.sub.6) gas as an n-type impurity material are alternately supplied onto the substrate, and each supply amount of the material gases is controlled at a value to obtain a film growth rate for forming the corresponding monoatomic layer or monomolecular layer to each material at each opening. Also disclosed is an apparatus for performing the above-disclosed method of chemical vapor deposition, wherein four reaction chambers are included, and the material gases are supplied to the respective reaction chambers in accordance with the following gas supply sequences: Chamber 1: TMG+H.sub.2 /H.
    Type: Grant
    Filed: November 28, 1990
    Date of Patent: July 20, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshito Kawakyu, Hironori Ishikawa, Masahiro Sasaki, Masao Mashita
  • Patent number: 5213654
    Abstract: A vapor-phase epitaxial growth method for group III-V compound semiconductor crystal layers by which alternating layers of (InAs)1 and (GaAs)1 are grown on an InP substrate by means of vapor-phase epitaxy while different material gases are supplied alternately. The substrate is irradiated with excimer laser light when a specific layer of the crystal layers is grown, thereby controlling the thickness of the specific crystal layer on a monoatomic scale.
    Type: Grant
    Filed: May 17, 1991
    Date of Patent: May 25, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Sasaki, Yoshito Kawakyu, Hironori Ishikawa, Masao Mashita
  • Patent number: 4433340
    Abstract: Disclosed is an optical recording medium. This optical recording medium has a substrate made of a transparent material such as an acrylic resin; and a recording layer for receiving an energy beam such as a laser beam whose intensity is changed in response to quantized information and for receiving desired information by melt-deforming in response to the intensity of the energy beam. The recording layer contains tellurium as a base material and carbon at a predetermined content of 40 atomic percent.
    Type: Grant
    Filed: March 22, 1982
    Date of Patent: February 21, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Masao Mashita, Nobuaki Yasuda, Tomoyuki Ishibshi, deceased, Satoshi Ishibashi, legal representative
  • Patent number: 4065734
    Abstract: The elastic surface wave device comprises a piezoelectric substrate having a dielectric constant of .epsilon..sub.2, a dielectric film having a dielectric constant of .epsilon..sub.1 and a thickness of h, and deposited on the piezoelectric substrate, and an inter-digital type input-ouput transducer formed on the dielectric film. The ratio of the dielectric constants .epsilon..sub.1 /.epsilon..sub.2, and a function 2.pi./.lambda..multidot.h proportioned to the thickness of the dielectric film are selected to satisfy a condition established in a frustum shaped region bounded by coordinate points P (.epsilon..sub.1 /.epsilon..sub.2 = 1/5,(2.pi./.lambda.).multidot.h = 0.1), Q(.epsilon..sub.1 /.epsilon..sub.2 = 1/5,(2.pi./.lambda.).multidot.h = 0.00016), R(.epsilon..sub.1 /.epsilon..sub.2 = 1/500,(2.pi./.lambda.).multidot.h = 0.0004), and S(.epsilon..sub.1 /.epsilon..sub.2 = 1/500, (2.pi./.lambda.).multidot.h = 0.006) on a graph wherein the ratio .epsilon..sub.1 /.epsilon..sub.
    Type: Grant
    Filed: July 14, 1976
    Date of Patent: December 27, 1977
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Shouzo Takeno, Masao Mashita, Toshihiro Onodera