Abstract: An organic electronic device provided with an organic electronic element on one surface of a substrate, wherein the substrate has a metal layer and an insulating layer overlaid on at least one face side of the metal layer, and the one face of the substrate does not have an irregularity peak having a K value of equal to or lower than ?0.07 as calculated by expression (1). In the expression (1), x represents an irregularity peak position when a line roughness analysis is conducted on a 10 ?m square on the one face of the substrate with an interval of 2.45 nm, f(x) represents a surface irregularity height (nm) at x, and dx represents an infinitesimal change in x. K=[f(x+dx)?2f(x)+f(x?dx)]/dx2 . . .

Abstract: The surface density of projections formed on a thin metal film of a temperature-measuring member having the metal film having been subjected to a temperature profile is calculated with a number-calculating section according to image data fed into an arithmetic processing unit through an optical microscope, CCD camera, and I/O board. The maximum temperature of the object is determined with the temperature-calculating unit according to the surface density and data on the maximum temperature and surface density previously stored in memory. Furthermore, a temperature-measuring member constituted by a thin aluminum film arranged on a substrate is used. A reduction in the reflectivity of the film due to projections formed on the film surface according to a temperature profile to which the member has been subjected is measured. The maximum temperature in the temperature profile is estimated according to the reduction in reflectivity.

Abstract: A porous metal thin film formed from aluminum has a film structure in which domains having an average diameter of 200 nm or more, and 500 nm or less and being formed through aggregation of a plurality of grains having an average grain diameter of 50 nm or more, and 160 nm or less are distributed discretely at an average distance of 5 nm or more, and 40 nm or less, wherein the area occupied by the above-described domains is 60% or more, and 90% or less in a cross-section in any direction of the porous metal thin film.

Abstract: An electroconductive diffuse reflective film is made of an electroconductive metal, wherein the electroconductive diffuse reflective film has a porous structure in which crystal grains having an average grain diameter of 50 nm or more and 1,000 nm or less are separately arranged at intervals of 10 nm or more and 800 nm or less on average.

Abstract: Disclosed is a Cu alloy film for a display device that has high adhesion to a glass substrate while maintaining a low electric resistance characteristic of Cu-based materials. The Cu alloy film is wiring in direct contact with a glass substrate on a board and contains 0.1 to 10.0 atomic % in total of one or more elements selected from the group consisting of Ti, Al, and Mg. Also disclosed is a display device comprising a thin-film transistor that comprises the Cu alloy film. In a preferred embodiment of the display device, the thin-film transistor has a bottom gate-type structure, and a gate electrode and scanning lines in the thin-film transistor comprise the Cu alloy film and are in direct contact with the glass substrate.

Abstract: Provided is a semiconductor interconnection wherein a barrier layer different from a TiO2 layer is formed on an interface between an insulating film and a Cu interconnection without increasing electrical resistivity of the Cu interconnection. In the semiconductor interconnection, a Cu interconnection containing Ti is embedded in a trench arranged on an insulating film on the semiconductor substrate, and a TiC layer is formed between the insulating film and the Cu interconnection. The insulating film is preferably composed of SiCO or SiCN. The thickness of the TiC layer is preferably 3-30 nm.

Abstract: A metal thin film used in fabricating a damascene interconnection of a semiconductor device which exhibits excellent high temperature fluidity during high pressure annealing, and which can fabricate an interconnection for a semiconductor device which has a low electric resistance and stable high quality is provided. Also provided is an interconnection for a semiconductor device. More specifically, a metal thin film for use as an interconnection of a semiconductor device comprising a Cu alloy containing N at a content of not less than 0.4 at % to not more than 2.0 at %; and an interconnection for a semiconductor device fabricated by forming the metal thin film on an insulator film which is formed on a semiconductor substrate and which has grooves formed therein, and filling the metal thin film in the interior of the grooves by a high pressure annealing process are provided.

Abstract: A method of fabricating semiconductor interconnections is provided which can form a Ti-rich layer as a barrier layer and which can embed pure Cu material as interconnection material into every corner of grooves provided in an insulating film even when the grooves have a narrow minimum width and are deep. The method may include the steps of forming one or more grooves in an insulating film on a semiconductor substrate, the recess having a minimum width of 0.15 ?m or less and a ratio of a depth of the groove to the minimum width thereof (depth/minimum width) of 1 or more, forming a Cu alloy thin film containing 0.5 to 10 atomic % of Ti in the groove of the insulated film along a shape of the groove in a thickness of 10 to 50 nm, forming a pure Cu thin film in the groove with the Cu alloy thin film attached thereto, and annealing the substrate with the films at 350° C. or more to allow the Ti to be precipitated between the insulating film and the Cu alloy thin film.

Abstract: A Cu wire in a semiconductor device according to the present invention is a Cu wire embedded into wiring gutters or interlayer connective channels formed in an insulating film on a semiconductor substrate and the Cu wire comprises: a barrier layer comprising TaN formed on the wiring gutter side or the interlayer connective channel side; and a wire main body comprising Cu comprising one or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os in a total content of 0.05 to 3.0 atomic percent. The Cu wire in a semiconductor device according to the present invention is excellent in adhesiveness between the wire main body and the barrier layer.

Abstract: A porous metal thin film formed from aluminum has a film structure in which domains having an average diameter of 200 nm or more, and 500 nm or less and being formed through aggregation of a plurality of grains having an average grain diameter of 50 nm or more, and 160 nm or less are distributed discretely at an average distance of 5 nm or more, and 40 nm or less, wherein the area occupied by the above-described domains is 60% or more, and 90% or less in a cross-section in any direction of the porous metal thin film.

Abstract: An electroconductive diffuse reflective film is made of an electroconductive metal, wherein the electroconductive diffuse reflective film has a porous structure in which crystal grains having an average grain diameter of 50 nm or more and 1,000 nm or less are separately arranged at intervals of 10 nm or more and 800 nm or less on average.

Abstract: There is provided a fabrication method for interconnections, capable of embedding a Cu-alloy in recesses in an insulating film, and forming a barrier layer on an interface between the an insulating film and Cu-interconnections, without causing a rise in electric resistivity of the interconnections when fabricating semiconductor interconnections of the Cu-alloy embedded in the recesses provided in the insulating film on a semiconductor substrate. The fabrication method for the interconnections may comprise the steps of forming the respective recesses having a minimum width not more than 0.15 ?m, and a ratio of a depth thereof to the minimum width (a depth/minimum width ratio) not less than 1, forming a Cu-alloy film containing Ti in a range of 0.5 to 3 at %, and N in a range of 0.4 to 2.0 at % over the respective recesses, and subsequently, annealing the Cu-alloy film to not lower than 200° C.

Abstract: The surface density of projections formed on a thin metal film of a temperature-measuring member having the metal film having been subjected to a temperature profile is calculated with a number-calculating section according to image data fed into an arithmetic processing unit through an optical microscope, CCD camera, and I/O board. The maximum temperature of the object is determined with the temperature-calculating unit according to the surface density and data on the maximum temperature and surface density previously stored in memory. Furthermore, a temperature-measuring member constituted by a thin aluminum film arranged on a substrate is used. A reduction in the reflectivity of the film due to projections formed on the film surface according to a temperature profile to which the member has been subjected is measured. The maximum temperature in the temperature profile is estimated according to the reduction in reflectivity.

Abstract: A Cu alloy for semiconductor interconnections contains at least one selected from the group consisting of 0.10 to 10 atomic percent of Sb, 0.010 to 1.0 atomic percent of Bi, and 0.01 to 3 atomic percent of Dy, with the balance being Cu and inevitable impurities. The Cu alloy can be reliably embedded in narrow trenches and/or via holes for interconnections.

Abstract: A method of fabricating semiconductor interconnections is provided which can form a Ti-rich layer as a barrier layer and which can embed pure Cu material as interconnection material into every corner of grooves provided in an insulating film even when the grooves have a narrow minimum width and are deep. The method may include the steps of forming one or more grooves in an insulating film on a semiconductor substrate, the recess having a minimum width of 0.15 ?m or less and a ratio of a depth of the groove to the minimum width thereof (depth/minimum width) of 1 or more, forming a Cu alloy thin film containing 0.5 to 10 atomic % of Ti in the groove of the insulated film along a shape of the groove in a thickness of 10 to 50 nm, forming a pure Cu thin film in the groove with the Cu alloy thin film attached thereto, and annealing the substrate with the films at 350° C. or more to allow the Ti to be precipitated between the insulating film and the Cu alloy thin film.

Abstract: There is provided a fabrication method for interconnections, capable of embedding a Cu-alloy in recesses in an insulating film, and forming a barrier layer on an interface between the an insulating film and Cu-interconnections, without causing a rise in electric resistivity of the interconnections when fabricating semiconductor interconnections of the Cu-alloy embedded in the recesses provided in the insulating film on a semiconductor substrate. The fabrication method for the interconnections may comprise the steps of forming the respective recesses having a minimum width not more than 0.15 ?m, and a ratio of a depth thereof to the minimum width (a depth/minimum width ratio) not less than 1, forming a Cu-alloy film containing Ti in a range of 0.5 to 3 at %, and N in a range of 0.4 to 2.0 at % over the respective recesses, and subsequently, annealing the Cu-alloy film to not lower than 200° C.

Abstract: A metal thin film used in fabricating a damascene interconnection of a semiconductor device which exhibits excellent high temperature fluidity during high pressure annealing, and which can fabricate an interconnection for a semiconductor device which has a low electric resistance and stable high quality is provided. Also provided is an interconnection for a semiconductor device. More specifically, a metal thin film for use as an interconnection of a semiconductor device comprising a Cu alloy containing N at a content of not less than 0.4 at % to not more than 2.0 at %; and an interconnection for a semiconductor device fabricated by forming the metal thin film on an insulator film which is formed on a semiconductor substrate and which has grooves formed therein, and filling the metal thin film in the interior of the grooves by a high pressure annealing process are provided.

Abstract: A Cu alloy for semiconductor interconnections contains at least one selected from the group consisting of 0.10 to 10 atomic percent of Sb, 0.010 to 1.0 atomic percent of Bi, and 0.01 to 3 atomic percent of Dy, with the balance being Cu and inevitable impurities. The Cu alloy can be reliably embedded in narrow trenches and/or via holes for interconnections.

Abstract: The present invention relates to a method and apparatus for measuring the organic carbon content (TOC) in a test liquid by irradiating the test liquid, such as ultrapure water, with ultraviolet radiation and measuring the conductivity of the test liquid that changes due to the produced organic acids and carbon dioxide. After the test liquid is irradiated for a fixed time interval with ultraviolet light in an oxidization process vessel, the irradiation is stopped. The flow rate of the test liquid is such that a portion of test liquid is present that has received the complete irradiation from the commencement to the extinguishing of the lighting of the ultraviolet light source.

Abstract: A semiconductor integrated circuit comprising a functional block 500 which includes macrocells 510 to 513. A macrocell 510 is connected to four input-output terminals 530 to 533 on four sides of an outline of the functional block 500 via a multi-layer wiring 580. Another functional block to be connected to this macrocell 510 is placed in any position upward, downward, left, or right of the functional block 500, whereas one input terminal located closest to the other functional block is selected as an effective terminal among four input-output terminals 530 to 533. Two of the functional blocks are connected only via this effective terminal. The other input-output terminals remain as dummy terminals. It is possible to reduce detouring routing among functional blocks by providing the semiconductor integrated circuit with the functional block 500 having such a configuration.