Patents by Inventor Masao Takatoo

Masao Takatoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5825920
    Abstract: A binary processing method for a variable density image the method includes the steps of binary processing an image having variable density, according to which brightness of an image having variable density to be binary processed is given as 1/n (where n is an integer of 2 or above), and expansion processing and smoothening processing the image having the brightness of 1/n so that a threshold value image for binary processing is generated. A difference is obtained between the threshold value image and the variable density image to be binary processed, such that it is possible to carry out binary processing even for an image having a complex background or variance in brightness.
    Type: Grant
    Filed: December 22, 1992
    Date of Patent: October 20, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Tadaaki Kitamura, Masao Takatoo, Norio Tanaka
  • Patent number: 5757287
    Abstract: An object recognition system using the image processing in which an area having a unique feature is extracted from an input image of an object, the unique image is registered in a shade template memory circuit as a shade template, the input image is searched for an image similar to the shade template registered by a shade pattern matching circuit, the position of an object is determined for each template, the speed and direction of movement of the object is determined from the positional information, and the results thereof are integrated by a separation/integration circuit, thereby recognizing the whole of the moving object.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: May 26, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Tadaaki Kitamura, Yoshiki Kobayashi, Kunio Nakanishi, Masakazu Yahiro, Yoshiyuki Satoh, Toshiro Shibata, Takeshi Horie, Katsuyuki Yamamoto, Masao Takatoo, Haruki Inoue, Kazuyoshi Asada
  • Patent number: 5703778
    Abstract: A road traffic control method is provided which can continue to maximize the number of vehicles allowed to run on a road and shorten time required for a vehicle to reach a destination, by preventing and relieving congestion. The method controls traffic of vehicles running on each of a plurality of parallel running roads. Each road is made connected at an interval of a predetermined distance, and at least one of the plurality of roads has a plurality of lanes. The method includes the steps of: detecting traffic of vehicles running in two counter directions on each road, at a position before at least one connected point of each of the plurality of roads; and changing ratio between the numbers of lanes of at least one of the plurality of roads, in accordance with the detected traffic of vehicles running in the two counter directions.
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: December 30, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Kazunori Takahashi, Nobuhiro Hamada, Masao Takatoo, Tohru Nagai, Toshiko Suzuki, Souichi Furukawa
  • Patent number: 5646853
    Abstract: A traffic control system having a road information storing unit for storing information of a road map and the capacity of roads on the road map, a traffic measuring unit for measuring the traffic of roads, a traffic increase/decrease quantity calculating unit for calculating a traffic increase/decrease quantity between main points by using the measured traffic, a road traffic calculating unit for calculating traffic of a main road, by using the traffic increase/decrease quantity, and an area determining unit for determining an area which is the area for congestions less traffic by using the calculated traffic and the road capacity while maintaining the traffic increase/decrease quantity at a proper value. It is possible to control the traffic while considering nearby traffic conditions, to prevent and relieve congestion, and to maximize the traffic of roads, thereby minimizing the time required for reaching a destination.
    Type: Grant
    Filed: July 16, 1992
    Date of Patent: July 8, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Kazunori Takahashi, Nobuhiro Hamada, Masao Takatoo, Tohru Nagai, Toshiko Suzuki
  • Patent number: 5554983
    Abstract: An object recognition system using the image processing in which an area having a unique feature is extracted from an input image of an object, the unique image is registered in a shade template memory circuit as a shade template, the input image is searched for an image similar to the shade template registered by a shade pattern matching circuit, the position of an object is determined for each template, the speed and direction of movement of the object is determined from the positional information, and the results thereof are integrated by a separation/integration circuit, thereby recognizing the whole of the moving object.
    Type: Grant
    Filed: April 23, 1993
    Date of Patent: September 10, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Tadaaki Kitamura, Yoshiki Kobayashi, Kunio Nakanishi, Masakazu Yahiro, Yoshiyuki Satoh, Toshiro Shibata, Takeshi Horie, Katsuyuki Yamamoto, Masao Takatoo, Haruki Inoue, Kazuyoshi Asada
  • Patent number: 5546503
    Abstract: In a neural network having neurons connected in a multi-layer, firstly, input signal sets are sequentially entered to statistically process the outputs of hidden neurons and determine the optimum number of hidden neurons. Secondly, while changing the input signal entered to each input neuron to the maximum change limit, the change of output values of the other input neurons are checked to thereby determine an unnecessary input neuron. Thirdly, the weights between input neurons and hidden neurons are set to be in correspondence with a hyperplane to enable pattern recognition.
    Type: Grant
    Filed: August 13, 1991
    Date of Patent: August 13, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Shigeo Abe, Masahiro Kayama, Hiroshi Takenaga, Yasuo Morooka, Junzo Kawakami, Masao Takatoo
  • Patent number: 5295197
    Abstract: An information processing apparatus using a neural network learning function has, in one embodiment, a computer system and a pattern recognition apparatus associated with each other via a communication cable. The computer system includes a learning section having a first neural network and serves to adjust the weights of connection therein as a result of learning with a learning data signal supplied thereto from the pattern recognition apparatus via the communication cable. The pattern recognition apparatus includes an associative output section having a second neural network and receives data on the adjusted weights from the learning section via the communication cable to reconstruct the second neural network with the data on the adjusted weights. The pattern recognition apparatus with the associative output section having the reconstructed second neural network performs pattern recognition independently of the computer system with the communication cable being brought into an electrical isolation mode.
    Type: Grant
    Filed: October 11, 1991
    Date of Patent: March 15, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Takenaga, Yoshiyuki Okuyama, Masao Takatoo, Kazuyoshi Asada, Norio Tanaka, Tadaaki Kitamura, Kuniyuki Kikuchi
  • Patent number: 5243668
    Abstract: A method and apparatus for binarizing a variable density image wherein brightness of the variable density image is changed by 1/n (where n is an integer of 2 or above), and an expansion processing is carried out on the brightness changed image to generate an expanded image. A smoothing processing is performed on the expanded image to generate a smoothed image and a differential image is generated by taking a difference between the smoothed image and the variable density image. The differential image is binarized by comparing the differential image to a predetermined threshold.
    Type: Grant
    Filed: January 28, 1991
    Date of Patent: September 7, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Tadaaki Kitamura, Masao Takatoo, Norio Tanaka
  • Patent number: 5095365
    Abstract: An abnormality monitoring system comprises controller for changing monitoring frequency according to the operating state of devices to be monitored and the degree of monitoring importance and controller for correcting an inputted monitor picture by computing a positional shift of the monitor picture to a reference picture using a mark position of the monitor picture and a mark position of the reference picture, wherein, when abnormality is detected, the contents of the abnormality and the contents of processing against the abnormality are displayed as a guidance.
    Type: Grant
    Filed: October 17, 1990
    Date of Patent: March 10, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Masao Takatoo, Chieko Onuma, Junzo Kawakami, Masayuki Fukai, Tadaaki Kitamura, Seiitsu Nigawara
  • Patent number: 5086479
    Abstract: An information processing apparatus using a neural network learning function has, in one embodiment, a computer system and a pattern recognition apparatus associated with each other via a communication cable. The computer system includes a learning section having a first neural network and serves to adjust the weights of connection therein as a result of learning with a learning data signal supplied thereto from the pattern recognition apparatus via the communication cable. The pattern recognition apparatus includes an associative output section having a second neural network and receives data on the adjusted weights from the learning section via the communication cable to reconstruct the second neural network with the data on the adjusted weights. The pattern recognition apparatus with the associative output section having the reconstructed second neural network performs pattern recognition independently of the computer system with the communication cable being brought into an electrical isolation mode.
    Type: Grant
    Filed: June 28, 1990
    Date of Patent: February 4, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Takenaga, Yoshiyuki Okuyama, Masao Takatoo, Kazuyoshi Asada, Norio Tanaka, Tadaaki Kitamura, Kuniyuki Kikuchi
  • Patent number: 5003616
    Abstract: An image processing apparatus having a character extraction unit for extracting an area whose density distribution characteristic meets a predetermined condition such as a binarization threshold and a size and a type of local filtering, from an input image of multiple gray levels, and extracts an object area as an output image from the input image by using the characteristic extraction unit. An area designation means designates an area having a uniform density distribution and containing the object area, to the input image. Condition determination means determines the condition for the characteristic extraction unit based on the density distribution characteristic of the input image in the designated area. In an image processing expert system, the image characteristics of the object image and the background in the area designated by the area designation means are evaluated and analyzed and the inquiry in the form of message is effected to quantize the evaluation of the image characteristic.
    Type: Grant
    Filed: May 31, 1988
    Date of Patent: March 26, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Miyahiko Orita, Morio Kanasaki, Yuji Toda, Tadaaki Mishima, Masato Suzuki, Chieko Onuma, Masao Takatoo
  • Patent number: 4941192
    Abstract: In a method of recognizing a pattern of a gray level image the image to be processed is subjected to a normalization process, local gray level feature parameters are extracted from the normalized image at its sampling points, and the pattern is identified by using the extracted feature parameters in accordance with a predetermined recognition procedure. An apparatus for recognizing a pattern of a gray level includes a memory for storing a gray level image having several brightness tone levels, a normalization circuit for normalizing the brightness of the gray level image to be processed, an extraction circuit for extracting local gray level feature parameters from the obtained normality image at specific points, and a recognition circuit for identifying the pattern by using the feature parameters in accordance with a predetermined.
    Type: Grant
    Filed: April 19, 1988
    Date of Patent: July 10, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Tadaaki Mishima, Morio Kanasaki, Masao Takatoo, Hideo Ota
  • Patent number: 4823194
    Abstract: An original picture taken by an ITV camera is subject to a local maximum filter processing and, if necessary, further to a local minimum filter processing, so that a background image is formed from the original picture itself. A target image included in the original picture is extracted separated from the background image by the subtraction between the thus obtained background image and the original picture. According to the present invention, since the background image is formed on the basis of the original picture, the unevenness or change of brightness, which equally influences on both of the target image and the background image, has no influence on the accurate extraction of the target image.
    Type: Grant
    Filed: July 30, 1987
    Date of Patent: April 18, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Tadaaki Mishima, Morio Kanasaki, Masao Takatoo, Kazunori Fujiwara, Yoshiki Kobayashi
  • Patent number: 4733305
    Abstract: A conversational picture processing system having a temporary memory for storing picture processing commands inputted by an operator. The system executes picture processing commands inputted by the operator, displays processed picture as a result of execution of each command, and stores the commands in the temporary memory. The system reads out a picture processing command specified by the operator from the temporary memory and stores the command as a registered command in a command list memory within the system.
    Type: Grant
    Filed: March 15, 1985
    Date of Patent: March 22, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Shuuichi Miura, Tadashi Fukushima, Yoshiki Kobayashi, Masao Takatoo, Yoichi Takagi
  • Patent number: 4644490
    Abstract: A pipelined adder for adding or subtracting two floating point input data each expressed by a sign data, an exponent data and a mantissa expressed in a sign-magnitude format, in accordance with an external operation mode designation signal to produce a floating point sum or difference data in a sign-magnitude format. In a first stage of the adder, the magnitudes of the exponent data of the input data are compared by a subtractor or a comparator and the magnitudes of the mantissa data of the input data are compared by a subtractor or a comparator. An actual operation mode for the mantissa data of the input data is determined, on the basis of the compare results of the exponent data and the mantissa data and the external operation mode designation signals, so that the operation result data is always expressed in a sign-magnitude format.
    Type: Grant
    Filed: April 11, 1984
    Date of Patent: February 17, 1987
    Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.
    Inventors: Takao Kobayashi, Shigeo Abe, Tadaaki Bandoh, Masao Takatoo, Hidekazu Matsumoto, Hideyuki Hara