Abstract: A semiconductor device, including: a semiconductor substrate formed of silicon carbide, components being formed at one surface of the semiconductor substrate; a periphery portion disposed at a pre-specified region of a periphery of the semiconductor substrate, the components not being formed at the periphery portion; and a plurality of trenches or portions of trenches formed at the periphery portion, an interior of each of the trenches being filled with a material with a different coefficient of thermal expansion from the silicon carbide.

Abstract: The disclosure reduces the risk of collapse of the wall surrounding the trench and suppresses the withstand voltage fluctuation that accompanies the manufacturing variation for a semiconductor device having a super junction structure. The semiconductor device includes a drift layer of a first conductivity type and a plurality of embedded parts embedded in the drift layer. The embedded parts are of a second conductivity type different from the first conductivity type, and the embedded parts are arranged with a first direction as a longitudinal direction and spaced from each other along a second direction that intersects the first direction. A width of each of the embedded parts in the second direction changes continuously along the first direction.

Abstract: A semiconductor device, including: a semiconductor substrate formed of silicon carbide, components being formed at one surface of the semiconductor substrate; a periphery portion disposed at a pre-specified region of a periphery of the semiconductor substrate, the components not being formed at the periphery portion; and a plurality of trenches or portions of trenches formed at the periphery portion, an interior of each of the trenches being filled with a material with a different coefficient of thermal expansion from the silicon carbide.

Abstract: The disclosure reduces the risk of collapse of the wall surrounding the trench and suppresses the withstand voltage fluctuation that accompanies the manufacturing variation for a semiconductor device having a super junction structure. The semiconductor device includes a drift layer of a first conductivity type and a plurality of embedded parts embedded in the drift layer. The embedded parts are of a second conductivity type different from the first conductivity type, and the embedded parts are arranged with a first direction as a longitudinal direction and spaced from each other along a second direction that intersects the first direction. A width of each of the embedded parts in the second direction changes continuously along the first direction.

Abstract: The object is simplification of a manufacturing process for nonvolatile memory by reducing additional processes for forming a charge storage structure, and downsizing of nonvolatile memory.

Abstract: The object is simplification of a manufacturing process for nonvolatile memory by reducing additional processes for forming a charge storage structure, and downsizing of nonvolatile memory.

Abstract: The object is simplification of a manufacturing process for nonvolatile memory by reducing additional processes for forming a charge storage structure, and downsizing of nonvolatile memory.

Abstract: The object is simplification of a manufacturing process for nonvolatile memory by reducing additional processes for forming a charge storage structure, and downsizing of nonvolatile memory.

Abstract: The present invention provides a method of evaluating a tunnel insulating film of a first MOS FET having a semiconductor substrate, a control gate, a floating gate and a tunnel insulating film formed between the semiconductor substrate and the floating gate which is injected with electrons from the semiconductor substrate by applying a direct current voltage to the control gate. The method is achieved by preparing a second MOS FET having a tunnel insulating film formed on a semiconductor substrate in the same batch process of forming the tunnel insulating film in the first MOS FET, measuring a subthreshold swing of the second MOS FET, applying a direct current electric field to the tunnel insulating film in the second MOS FET for a predetermined time, remeasuring the subthreshold swing of the second MOS FET, and evaluating the tunnel insulating film in the first MOS FET by using a change of the subthreshold swing before and after the applying step.