Patents by Inventor Masao Tsukizawa

Masao Tsukizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8169784
    Abstract: To improve reliability of a circuit module by improving heat release performance and minimizing thermal influence on a device to be mounted, a base substrate having a first substrate mounted thereon is fitted into a lower portion of casing member, and a second substrate is installed in the upper portion of the casing member so that a spaced area can be provided. In addition, a drive device to be installed on the second substrate is positioned off the center of the second substrate.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: May 1, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Patent number: 8107255
    Abstract: Provided is a circuit device that allows a plurality of circuit boards, which are stacked each other and arranged in a case member, to be sealed with a resin effectively, and a method of manufacturing the same. In a hybrid integrated circuit device, a first circuit board is overlaid with the second circuit board and both of the boards are fitted into the case member. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, an opening is provided in a side wall part of the case member, and an internal space of the case member communicates with the outside through this opening. Accordingly, in the resin sealing step, a sealing resin can be injected into the internal space of the case member from the outside through this opening.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: January 31, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Patent number: 8102655
    Abstract: Provided is a circuit device capable of increasing the packaging density and preventing the thermal interference between circuit elements to be incorporated. In a hybrid integrated circuit device, a first circuit board and a second circuit board are fitted into a case member in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, inside the case member, provided is a hollow portion that is not filled with a sealing resin. Such a configuration prevents the second circuit element, which is a microcomputer, from operating unstably due to a heat generated in the first circuit element, which is a power transistor, for example.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: January 24, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Patent number: 8102670
    Abstract: Provided is a circuit device, in which circuit elements incorporated are electrically connected to each other via a lead so as to achieve both of the enhanced functionality and miniaturization. In a hybrid integrated circuit device, a first circuit board and a second circuit board are incorporated into a case member in a way that a first circuit board is overlaid with a second circuit board. A first circuit element is arranged on the upper face of the first circuit board and a second circuit element is arranged on the upper face of the second circuit board. Leads provided in the hybrid integrated circuit device include a lead connected only to the first circuit element mounted on the first circuit board, a lead connected only to the second circuit element mounted on the second circuit board, and a lead connected to both of the first circuit element and the second circuit element.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: January 24, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Publication number: 20100284159
    Abstract: Provided is a circuit device capable of increasing the packaging density and preventing the thermal interference between circuit elements to be incorporated. In a hybrid integrated circuit device, a first circuit board and a second circuit board are fitted into a case member in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, inside the case member, provided is a hollow portion that is not filled with a sealing resin. Such a configuration prevents the second circuit element, which is a microcomputer, from operating unstably due to a heat generated in the first circuit element, which is a power transistor, for example.
    Type: Application
    Filed: July 15, 2010
    Publication date: November 11, 2010
    Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Patent number: 7782628
    Abstract: Provided is a circuit device capable of increasing the packaging density and preventing the thermal interference between circuit elements to be incorporated. In a hybrid integrated circuit device, a first circuit board and a second circuit board are fitted into a case member in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, inside the case member, provided is a hollow portion that is not filled with a sealing resin. Such a configuration prevents the second circuit element, which is a microcomputer, from operating unstably due to a heat generated in the first circuit element, which is a power transistor, for example.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: August 24, 2010
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Patent number: 7751194
    Abstract: Provided is a circuit device capable of increasing the packaging density and also suppressing the thermal interference between incorporated circuit elements. In a hybrid integrated circuit device, a first circuit board and a second circuit board are incorporated into a case member being arranged in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper face of the first circuit board and a second circuit element is arranged on the upper face of the second circuit board. In addition, inside the case member, a hollow portion (internal space) which is not filled with a sealing resin is provided, and this hollow portion communicates with the outside through a communicating opening, which is provided by partially opening the case member.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: July 6, 2010
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co. Ltd.
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Publication number: 20090103276
    Abstract: Provided is a circuit device that allows a plurality of circuit boards, which are stacked each other and arranged in a case member, to be sealed with a resin effectively, and a method of manufacturing the same. In a hybrid integrated circuit device, a first circuit board is overlaid with the second circuit board and both of the boards are fitted into the case member. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, an opening is provided in a side wall part of the case member, and an internal space of the case member communicates with the outside through this opening. Accordingly, in the resin sealing step, a sealing resin can be injected into the internal space of the case member from the outside through this opening.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 23, 2009
    Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Hideyuki SAKAMOTO, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Publication number: 20090086431
    Abstract: Provided is a circuit device capable of increasing the packaging density and also suppressing the thermal interference between incorporated circuit elements. In a hybrid integrated circuit device, a first circuit board and a second circuit board are incorporated into a case member being arranged in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper face of the first circuit board and a second circuit element is arranged on the upper face of the second circuit board. In addition, inside the case member, a hollow portion (internal space) which is not filled with a sealing resin is provided, and this hollow portion communicates with the outside through a communicating opening, which is provided by partially opening the case member.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 2, 2009
    Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Publication number: 20090086442
    Abstract: To improve reliability of a circuit module by improving heat release performance and minimizing thermal influence on a device to be mounted, a base substrate having a first substrate mounted thereon is fitted into a lower portion of casing member, and a second substrate is installed in the upper portion of the casing member so that a spaced area can be provided. In addition, a drive device to be installed on the second substrate is positioned off the center of the second substrate.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 2, 2009
    Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Hideyuki SAKAMOTO, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Publication number: 20090086455
    Abstract: Provided is a circuit device, in which circuit elements incorporated are electrically connected to each other via a lead so as to achieve both of the enhanced functionality and miniaturization. In a hybrid integrated circuit device, a first circuit board and a second circuit board are incorporated into a case member in a way that a first circuit board is overlaid with a second circuit board. A first circuit element is arranged on the upper face of the first circuit board and a second circuit element is arranged on the upper face of the second circuit board. Leads provided in the hybrid integrated circuit device include a lead connected only to the first circuit element mounted on the first circuit board, a lead connected only to the second circuit element mounted on the second circuit board, and a lead connected to both of the first circuit element and the second circuit element.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 2, 2009
    Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Hideyuki SAKAMOTO, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Publication number: 20090086454
    Abstract: Provided is a circuit device capable of increasing the packaging density and preventing the thermal interference between circuit elements to be incorporated. In a hybrid integrated circuit device, a first circuit board and a second circuit board are fitted into a case member in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, inside the case member, provided is a hollow portion that is not filled with a sealing resin. Such a configuration prevents the second circuit element, which is a microcomputer, from operating unstably due to a heat generated in the first circuit element, which is a power transistor, for example.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 2, 2009
    Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Patent number: 7231307
    Abstract: In some embodiments, a temperature measuring apparatus is provided with a light receiving portion having a plurality of light receiving units for measuring heat quantity of divided temperature detecting area in a noncontact manner, a thermal sensor for detecting temperature of each of the plurality of light receiving units, a calculation portion for calculating a temperature of each of the divided temperature detecting areas based on the temperature obtained by the thermal sensor and the relative temperature difference obtained by the light receiving portion, a correction information holding portion for holding correction information on known reference temperature of the temperature detecting area and its corresponding calculated result outputted from the calculation portion obtained when heat quantity of the temperature detecting area is set to the reference temperature, and a correction portion for correcting the calculated result of the calculation portion based on the correction information.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: June 12, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Youji Takei, Masao Tsukizawa
  • Publication number: 20060080056
    Abstract: In some embodiments, a temperature measuring apparatus is provided with a light receiving portion having a plurality of light receiving units for measuring heat quantity of divided temperature detecting area in a noncontact manner, a thermal sensor for detecting temperature of each of the plurality of light receiving units, a calculation portion for calculating a temperature of each of the divided temperature detecting areas based on the temperature obtained by the thermal sensor and the relative temperature difference obtained by the light receiving portion, a correction information holding portion for holding correction information on known reference temperature of the temperature detecting area and its corresponding calculated result outputted from the calculation portion obtained when heat quantity of the temperature detecting area is set to the reference temperature, and a correction portion for correcting the calculated result of the calculation portion based on the correction information.
    Type: Application
    Filed: August 11, 2005
    Publication date: April 13, 2006
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Youji Takei, Masao Tsukizawa
  • Publication number: 20060069532
    Abstract: In some embodiments, a noise reduction circuit for use in a temperature measuring apparatus includes a replacing processing portion configured to execute replacing processing for replacing data of one of plural pixels among plural pixels with data of another pixel among the plural pixels, the data of the one of plural pixels being discriminated as noise, and an averaging processing portion configured to execute averaging processing for averaging the data of the one of plural pixels to smooth the data of the one of plural pixels. The averaging processing is executed at the averaging processing portion after executing the replacing processing at the replacing processing portion.
    Type: Application
    Filed: September 29, 2005
    Publication date: March 30, 2006
    Inventors: Youji Takei, Masao Tsukizawa