Abstract: Semiconductor device 1000 includes semiconductor 102, an electric field relaxation structure, at least one surface electrode 112, passivation layer 114, and insulating layer 115. Semiconductor layer 102 has a predetermined element region. The electric field alleviation structure is disposed on semiconductor 102 at an end of the element region. On semiconductor 102, surface electrode 112 is disposed inside the electric field alleviation structure when viewed in a normal direction of semiconductor 102. Passivation layer 114 covers the electric field alleviation structure and a peripheral portion of at least one surface electrode 112, and has an opening portion above surface electrode 112. On surface electrode 112, insulating layer 115 is disposed inside opening portion 114p so as to be separated from passivation layer 114. When viewed in the normal direction of semiconductor 102, insulating layer 115 is disposed so as to surround partial region 112a of surface electrode 112.

Abstract: In the silicon carbide semiconductor element, a second silicon carbide semiconductor layer that is in contact with the surface of a first silicon carbide semiconductor layer has at least an upper layer including a dopant of a first conductivity type at a high concentration. Above a junction field effect transistor (JFET) region interposed between body regions that are disposed in the first silicon carbide semiconductor layer so as to be spaced from each other, the silicon carbide semiconductor element has a channel removed region, which is a cutout formed by removing a high concentration layer from the front surface side of the second silicon carbide semiconductor layer, the high concentration layer having a higher dopant concentration than at least the dopant concentration of the JFET region. The width of the channel removed region is smaller than that of the JFET region.

Abstract: A silicon carbide semiconductor device includes a transistor region, a diode region, a gate line region, and a gate pad region. The gate pad region and the gate line region are each disposed to be sandwiched between the diode region and the diode region, and a gate electrode on the gate pad region and the gate line region is formed on an insulating film formed on an epitaxial layer. Thus, breakdown of the insulating film in the gate region can be prevented without causing deterioration in quality of the gate insulating film, upon switching and avalanche breakdown.

Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, having a first principal surface and a second principal surface, a silicon carbide semiconductor layer of the first conductivity type, disposed on the first principal surface, a first electrode disposed on the silicon carbide semiconductor layer, and a second electrode disposed on the second principal surface and forming an ohmic junction with the semiconductor substrate. The semiconductor device satisfies 0.13?Rc/Rd, where Rc is the contact resistance between the second principal surface and the second electrode at room temperature and Rd is the resistance of the silicon carbide semiconductor layer in a direction normal to the first principal surface at room temperature.

Abstract: A semiconductor device according to an aspect of the present disclosure includes a semiconductor substrate having a first conductivity type and having a principal surface and a back surface, a silicon carbide semiconductor layer having the first conductivity type and disposed on the principal surface, barrier regions having a second conductivity type and disposed within the silicon carbide semiconductor layer, an edge termination region having the second conductivity type and disposed within the silicon carbide semiconductor layer, the edge termination region enclosing the barrier regions, a first electrode disposed on the silicon carbide semiconductor layer, and a second electrode disposed on the back surface, wherein each of the barrier regions has a polygonal boundary with the silicon carbide semiconductor layer, and each of sides of the polygonal boundary has an angle of 0° to 5° inclusive relative to <11-20> direction of crystal orientations of the semiconductor substrate.

Abstract: A semiconductor device includes a first silicon carbide semiconductor layer, a source including a source pad and a source wiring, a gate including a gate pad and a gate wiring, first unit cells disposed in a first element region, and second unit cells disposed in a second element region. In a plan view, the first and second element regions are adjacent to each other with the gate wiring between the first and second element regions. A first electrode including the gate electrode of each first unit cell is disposed in the first element region and electrically connected to the gate. A second electrode including the gate electrode of each second unit cell is disposed in the second element region and not electrically connected to the gate. The first and second electrodes are separated below the gate wiring.

Abstract: In the silicon carbide semiconductor element, a second silicon carbide semiconductor layer that is in contact with the surface of a first silicon carbide semiconductor layer has at least an upper layer including a dopant of a first conductivity type at a high concentration. Above a junction field effect transistor (JFET) region interposed between body regions that are disposed in the first silicon carbide semiconductor layer so as to be spaced from each other, the silicon carbide semiconductor element has a channel removed region, which is a cutout formed by removing a high concentration layer from the front surface side of the second silicon carbide semiconductor layer, the high concentration layer having a higher dopant concentration than at least the dopant concentration of the JFET region. The width of the channel removed region is smaller than that of the JFET region.

Abstract: A semiconductor device includes a first silicon carbide semiconductor layer, a source including a source pad and a source wiring, a gate including a gate pad and a gate wiring, first unit cells disposed in a first element region, and second unit cells disposed in a second element region. In a plan view, the first and second element regions are adjacent to each other with the gate wiring between the first and second element regions. A first electrode including the gate electrode of each first unit cell is disposed in the first element region and electrically connected to the gate. A second electrode including the gate electrode of each second unit cell is disposed in the second element region and not electrically connected to the gate. The first and second electrodes are separated below the gate wiring.

Abstract: A silicon carbide semiconductor device includes a transistor region, a diode region, a gate line region, and a gate pad region. The gate pad region and the gate line region are each disposed to be sandwiched between the diode region and the diode region, and a gate electrode on the gate pad region and the gate line region is formed on an insulating film formed on an epitaxial layer. Thus, breakdown of the insulating film in the gate region can be prevented without causing deterioration in quality of the gate insulating film, upon switching and avalanche breakdown.

Abstract: A semiconductor device includes first and second second-conductivity-type region groups containing multiple second-conductivity-type regions that are disposed on a first silicon carbide semiconductor layer of a first conductivity type, arrayed in parallel following one direction with a space between each other, and first and second electrodes disposed on the first silicon carbide semiconductor layer and forming a Schottky junction with the first silicon carbide semiconductor layer. The first electrode covers a position where a distance from adjacent first and second second-conductivity-type regions included in a first second-conductivity-type region group, and a distance from a third second-conductivity-type region included in a second second-conductivity-type region group and adjacent to the first and second second-conductivity-type regions, are equal.

Abstract: A semiconductor device includes a gate pad, a first source pad and a second source pad insulated from each other, a drain pad, a main region, and a sense region for detecting a forward current and a reverse current. The main region and the sense region each include a plurality of unit cells which are in parallel connection, the number of unit cells in the sense region being smaller than the number of unit cells in the main region. A source electrode of any unit cell in the main region is connected to the first source pad, and a source electrode of any unit cell in the sense region is connected to the second source pad.

Abstract: A semiconductor device according to an aspect of the present disclosure includes a semiconductor substrate having a first conductivity type and having a principal surface and a back surface, a silicon carbide semiconductor layer having the first conductivity type and disposed on the principal surface, barrier regions having a second conductivity type and disposed within the silicon carbide semiconductor layer, an edge termination region having the second conductivity type and disposed within the silicon carbide semiconductor layer, the edge termination region enclosing the barrier regions, a first electrode disposed on the silicon carbide semiconductor layer, and a second electrode disposed on the back surface, wherein each of the barrier regions has a polygonal boundary with the silicon carbide semiconductor layer, and each of sides of the polygonal boundary has an angle of 0° to 5° inclusive relative to <11-20> direction of crystal orientations of the semiconductor substrate.

Abstract: A semiconductor device according to an aspect of the present disclosure includes a semiconductor substrate having a first conductivity type and having a principal surface and a back surface, a silicon carbide semiconductor layer having the first conductivity type and disposed on the principal surface of the semiconductor substrate, a guard ring region having a second conductivity type and disposed within the silicon carbide semiconductor layer, a floating region having the second conductivity type and disposed within the silicon carbide semiconductor layer, a first electrode disposed on the silicon carbide semiconductor layer, and a second electrode disposed on the back surface of the semiconductor substrate, wherein the guard ring region and the floating region each include a pair of a high-concentration region having the second conductivity type and a low-concentration region having the second conductivity type.

Abstract: A semiconductor device includes a first silicon carbide semiconductor layer of a first conductive type that is positioned on a front surface of a substrate of the first conductive type, a transistor region that includes transistor cells, a Schottky region, and a boundary region. The boundary region includes a second body region and a gate connector that is arranged on the second body region via an insulating film and electrically connected with a gate electrode. The Schottky region includes a Schottky electrode that is arranged on the first silicon carbide semiconductor layer.

Abstract: A semiconductor device includes a silicon carbide semiconductor substrate, a silicon carbide layer, a switching element section, and an overvoltage detection element section whose area is smaller than that of the switching element section. The switching element section includes a first electrode pad, a first terminal section surrounding the first electrode pad and provided in the silicon carbide layer, and a first insulating film covering the first terminal section. The overvoltage detection element section includes a second electrode pad, a second terminal section surrounding the second electrode pad and provided in the silicon carbide layer, and a second insulating film covering the second terminal section and being in contact with the silicon carbide layer. A breakdown field strength of at least part of a portion of the second insulating film being in contact with the silicon carbide layer is lower than that of the first insulating film.

Abstract: A semiconductor device comprises a semiconductor substrate, a silicon carbide semiconductor layer of a first conductivity type on the semiconductor substrate, at least one ring-shaped region of a second conductivity type in the silicon carbide semiconductor layer, a first insulating film in contact with a part of the silicon carbide semiconductor layer, and a second insulating film which has a relative dielectric constant larger than a relative dielectric constant of the first insulating film and which is in contact with a part of the at least one ring-shaped region. In the semiconductor device, the at least one ring-shaped region is located in a termination region. The termination region surrounds a semiconductor element region when viewed from the direction perpendicular to a principal surface of the semiconductor substrate.

Abstract: This silicon carbide semiconductor device includes: a silicon carbide semiconductor layer; a gate insulating layer which is arranged over the silicon carbide semiconductor layer and which includes a silicon oxide film; a gate electrode which is arranged on the gate insulating layer; and a carbon transition layer which is interposed between the silicon carbide semiconductor layer and the silicon oxide film and which has a carbon atom concentration is 10% to 90% of a carbon atom concentration of the silicon carbide semiconductor layer. In a region of the carbon transition layer which is located closer to the silicon oxide film than a position where a nitrogen atom concentration becomes the highest is, a ratio of an integral of nitrogen atom concentrations to an integral of carbon atom concentrations is equal to or greater than 0.11.

Abstract: A semiconductor device includes a first silicon carbide semiconductor layer of a first conductive type that is positioned on a front surface of a substrate of the first conductive type, a transistor region that includes transistor cells, a Schottky region, and a boundary region. The boundary region includes a second body region and a gate connector that is arranged on the second body region via an insulating film and electrically connected with a gate electrode. The Schottky region includes a Schottky electrode that is arranged on the first silicon carbide semiconductor layer.

Abstract: This silicon carbide semiconductor device includes: a silicon carbide semiconductor layer; a gate insulating layer which is arranged over the silicon carbide semiconductor layer and which includes a silicon oxide film; a gate electrode which is arranged on the gate insulating layer; and a carbon transition layer which is interposed between the silicon carbide semiconductor layer and the silicon oxide film and which has a carbon atom concentration is 10% to 90% of a carbon atom concentration of the silicon carbide semiconductor layer. In a region of the carbon transition layer which is located closer to the silicon oxide film than a position where a nitrogen atom concentration becomes the highest is, a ratio of an integral of nitrogen atom concentrations to an integral of carbon atom concentrations is equal to or greater than 0.11.

Abstract: A semiconductor device includes a gate pad, a first source pad and a second source pad insulated from each other, a drain pad, a main region, and a sense region for detecting a forward current and a reverse current. The main region and the sense region each include a plurality of unit cells which are in parallel connection, the number of unit cells in the sense region being smaller than the number of unit cells in the main region. A source electrode of any unit cell in the main region is connected to the first source pad, and a source electrode of any unit cell in the sense region is connected to the second source pad.