Patents by Inventor Masao Yamane
Masao Yamane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060157825Abstract: The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.Type: ApplicationFiled: March 16, 2006Publication date: July 20, 2006Inventors: Yasunari Umemoto, Hideyuki Ono, Tomonori Tanoue, Yasuo Ohsone, Isao Ohbu, Chushiro Kusano, Atsushi Kurokawa, Masao Yamane
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Patent number: 7045877Abstract: The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.Type: GrantFiled: April 23, 2003Date of Patent: May 16, 2006Assignee: Renesas Technology Corp.Inventors: Yasunari Umemoto, Hideyuki Ono, Tomonori Tanoue, Yasuo Ohsone, Isao Ohbu, Chushiro Kusano, Atsushi Kurokawa, Masao Yamane
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Publication number: 20060076620Abstract: The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control electrode terminals are provided at least one, and a plurality of the first electrode terminals are arranged on one side and a plurality of the first electrode terminals are arranged on the other side with the control electrode terminals being interposed therebetween, wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on one side of the control electrode terminals constitute a first transistor portion, and wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on the other side of the control electrodeType: ApplicationFiled: November 17, 2005Publication date: April 13, 2006Inventors: Hitoshi Akamine, Masashi Suzuki, Masao Yamane, Tetsuaki Adachi
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Patent number: 6992528Abstract: The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control electrode terminals are provided at least one, and a plurality of the first electrode terminals are arranged on one side and a plurality of the first electrode terminals are arranged on the other side with the control electrode terminals being interposed therebetween, wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on one side of the control electrode terminals constitute a first transistor portion, and wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on the other side of the control electrodeType: GrantFiled: June 21, 2004Date of Patent: January 31, 2006Assignee: Renesas Technology Corp.Inventors: Hitoshi Akamine, Masashi Suzuki, Masao Yamane, Tetsuaki Adachi
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Publication number: 20050156756Abstract: A vehicular communications apparatus is configured to calculate information on relative positions, relative velocities, and relative moving directions between own vehicle and other vehicles at a point such as a junction where other vehicles tend to affect running of the own vehicle, and to search for and decide other vehicles which are to be opponents of radio communications, based on a calculated result, and communication opponents are decided from among the searched other vehicles, and radio communications are conducted therewith, and then, the vehicular communications apparatus obtains information on the other vehicles, in a time-sequential manner and by radio communications, and present the information to a driver of the own vehicle from time to time, thereby causing the driver to recognize dynamic information on the other vehicles, enabling the own vehicle to smoothly join a flow of traffic at a junction, for example.Type: ApplicationFiled: January 7, 2005Publication date: July 21, 2005Inventors: Susumu Fujita, Toru Takagi, Masao Yamane, Toshiro Muramatsu, Okihiko Nakayama
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Publication number: 20050116253Abstract: The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 comprising GaAs. The gate electrode 17 is patterned so as to extend in the vertical direction of the page surface between source electrodes 13 and drain electrodes 14, and to extend in left and right directions at other portions. Thus, the ratio of the gate electrode 17 disposed outside the active region is reduced, and the area of a gate pad 17A is reduced.Type: ApplicationFiled: November 17, 2004Publication date: June 2, 2005Inventors: Masao Yamane, Atsushi Kurokawa, Shinya Osakabe, Eigo Tange, Yasushi Shigeno, Hiroyuki Takazawa
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Patent number: 6861905Abstract: A power amplifier system has a high frequency power amplifier circuit section employing source-grounded enhancement type n-channel MESFETs for receiving a drain bias voltage and a gate bias voltage of zero volts or positive low potentials supplied from a unipolar power supply, and amplifying a superposed input signal therewith to output an amplified signal indicative of a change in drain currents. An output matching circuit section applies impedance matching to the amplified signal and outputs the resultant signal. A gate bias voltage circuit section supplies a gate bias voltage to the high frequency power amplifier circuit. When a forward direct current gate voltage is applied to a gate terminal with a source terminal coupled to ground, the DC gate voltage becomes greater than or equal to 0.65 volts, the DC gate voltage causing a gate current value per gate width of 100 micrometers to exceed 100 microamperes.Type: GrantFiled: February 2, 2004Date of Patent: March 1, 2005Assignee: Renesas Technology Corp.Inventors: Atsushi Kurokawa, Masao Yamane
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Publication number: 20040232485Abstract: The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control electrode terminals are provided at least one, and a plurality of the first electrode terminals are arranged on one side and a plurality of the first electrode terminals are arranged on the other side with the control electrode terminals being interposed therebetween, wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on one side of the control electrode terminals constitute a first transistor portion, and wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on the other side of the control electrodeType: ApplicationFiled: June 21, 2004Publication date: November 25, 2004Applicant: Renesas Technology Corp.Inventors: Hitoshi Akamine, Masashi Suzuki, Masao Yamane, Tetsuaki Adachi
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Publication number: 20040212044Abstract: A bipolar transistor having the enhanced characteristics is fabricated by etching a base mesa, which is formed below an emitter mesa (upper emitter layer) and a base electrode, so as to have jut regions on the edges of its generally rectangular region. A mask film, e.g., insulating film, is formed to cover the rectangular region and jut regions, and the base layer is etched by use of the insulating film as a mask to form a base mesa. Consequently, abnormal etching can be prevented from occurring along the base electrode and emitter mesa on the edges of the area where the base electrode and emitter mesa confront each other, and an increase in resistance between the base layer and the emitter layer can be prevented, whereby the bipolar transistor can have the enhanced characteristics.Type: ApplicationFiled: April 28, 2004Publication date: October 28, 2004Inventors: Atsushi Kurokawa, Masao Yamane, Yoshinori Imamura
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Patent number: 6787817Abstract: The present invention provides a semiconductor device for high frequency application having a high breakdown voltage and the method of manufacturing thereof. A region including a first conductivity type high impurity concentration semiconductor and a region including a first conductivity type low impurity concentration semiconductor are provided from an ohmic layer side at the side far from a semiconductor substrate of the end surface of a barrier layer opposite the semiconductor substrate and between the ohmic layer and a gate electrode. The sheet impurity concentration of the region including a first conductivity type low impurity concentration semiconductor is set to be lower than that between the bottom surface of the gate electrode at the side of the semiconductor substrate and the end surface of the channel layer opposite the semiconductor substrate.Type: GrantFiled: December 13, 2002Date of Patent: September 7, 2004Assignee: Renesas Technology CorporationInventors: Hiroyuki Takazawa, Shinichiro Takatani, Masao Yamane, Masayoshi Kobayashi
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Publication number: 20040155711Abstract: A power amplifier system having a high frequency power amplifier circuit section 10 employing as its amplifying elements source-grounded enhancement type n-channel MESFETs J1, J2 for receiving a drain bias voltage Vdd and a gate bias voltage Vgg of zero volts or positive low potentials as supplied from a unipolar power supply and for amplifying an input signal superposed therewith to thereby output an amplified signal indicative of a change in drain currents Id1, Id2, an output matching circuit section 11 for applying impedance matching to such amplified high frequency signal and then outputting the resultant signal, and a gate bias voltage circuit section 12 for supplying a gate bias voltage to the high frequency power amplifier circuit is disclosed along with a mobile communications terminal device including the system, wherein the MESFETs J1, J2 are such that in cases where a forward direct current (DC) gate voltage is applied to a gate terminal with a source terminal coupled to the ground, the DC gate volType: ApplicationFiled: February 2, 2004Publication date: August 12, 2004Applicant: RENESAS TECHNOLOGY CORPORATIONInventors: Atsushi Kurokawa, Masao Yamane
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Patent number: 6765268Abstract: The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control electrode terminals are provided at least one, and a plurality of the first electrode terminals are arranged on one side and a plurality of the first electrode terminals are arranged on the other side with the control electrode terminals being interposed therebetween, wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on one side of the control electrode terminals constitute a first transistor portion, and wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on the other side of the control electrodeType: GrantFiled: November 12, 2002Date of Patent: July 20, 2004Assignee: Renesas Technology CorpInventors: Hitoshi Akamine, Masashi Suzuki, Masao Yamane, Tetsuaki Adachi
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Patent number: 6743691Abstract: A bipolar transistor device with a large current capacity is formed by connecting a plurality of transistor elements to each other in parallel, each transistor element having a collector layer, a base layer, and an emitter layer formed respectively in a semiconductor substrate. In the bipolar transistor device, the base layers of a plurality of the transistor elements are extended in parallel to each other and those base layers are separated from each other. In each separated base layer, a first base electrode is formed on a part of the base layer which is separated from an emitter junction with the emitter layer, and a second base electrode is formed on another portion of the base layer closer to the emitter junction than the first base electrode. To dispose the base electrodes of a plurality of the transistor elements in parallel to each other, a base wiring is connected to the first base electrodes of those elements electrically.Type: GrantFiled: December 27, 2001Date of Patent: June 1, 2004Assignee: Renesas Technology Corp.Inventors: Atsushi Kurokawa, Masao Yamane, Kazuhiro Mochizuki
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Publication number: 20040065900Abstract: The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.Type: ApplicationFiled: April 23, 2003Publication date: April 8, 2004Applicant: Hitachi, Ltd.Inventors: Yasunari Umemoto, Hideyuki Ono, Tomonori Tanoue, Yasuo Ohsone, Isao Ohbu, Chushiro Kusano, Atsushi Kurokawa, Masao Yamane
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Patent number: 6708022Abstract: A power amplifier system has a high frequency power amplifier circuit section employing source-grounded enhancement type n-channel MESFETs for receiving a drain bias voltage and a gate bias voltage of zero volts or positive low potentials supplied from a unipolar power supply, and amplifying a superposed input signal therewith to output an amplified signal indicative of a change in drain currents. An output matching circuit section applies impedance matching to the amplified signal and outputs the resultant signal. A gate bias voltage circuit section supplies a gate bias voltage to the high frequency power amplifier circuit. When a forward direct current gate voltage is applied to a gate terminal with a source terminal coupled to ground, the DC gate voltage becomes greater than or equal to 0.65 volts, the DC gate voltage causing a gate current value per gate width of 100 micrometers to exceed 100 microamperes.Type: GrantFiled: May 8, 2000Date of Patent: March 16, 2004Assignee: Renesas Technology CorporationInventors: Atsushi Kurokawa, Masao Yamane
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Patent number: 6678507Abstract: A power amplifier system has a high frequency power amplifier circuit section employing source-grounded enhancement type n-channel MESFETs for receiving a drain bias voltage and a gate bias voltage of zero volts or positive low potentials supplied from a unipolar power supply, and amplifying a superposed input signal therewith to output an amplified signal indicative of a change in drain currents. An output matching circuit section applies impedance matching to the amplified signal and outputs the resultant signal. A gate bias voltage circuit section supplies a gate bias voltage to the high frequency power amplifier circuit. When a forward direct current gate voltage is applied to a gate terminal with a source terminal coupled to ground, the DC gate voltage becomes greater than or equal to 0.65 volts, the DC gate voltage causing a gate current value per gate width of 100 micrometers to exceed 100 microamperes.Type: GrantFiled: August 31, 2000Date of Patent: January 13, 2004Assignee: Hitachi, Ltd.Inventors: Atsushi Kurokawa, Masao Yamane
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Patent number: 6639257Abstract: A bipolar transistor device with a large current capacity is formed by connecting a plurality of transistor elements to each other in parallel, each transistor element having a collector layer, a base layer, and an emitter layer formed respectively in a semiconductor substrate. In the bipolar transistor device, the base layers of a plurality of the transistor elements are extended in parallel to each other and those base layers are separated from each other. In each separated base layer, a first base electrode is formed on a part of the base layer which is separated from an emitter junction with the emitter layer, and a second base electrode is formed on another portion of the base layer closer to the emitter junction than the first base electrode. To dispose the base electrodes of a plurality of the transistor elements in parallel to each other, a base wiring is connected to the first base electrodes of those elements electrically.Type: GrantFiled: April 29, 2002Date of Patent: October 28, 2003Assignee: Hitachi, Ltd.Inventors: Atsushi Kurokawa, Masao Yamane, Kazuhiro Mochizuki
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Publication number: 20030168672Abstract: The present invention provides a semiconductor device for high frequency application having a high breakdown voltage and the method of manufacturing thereof. A region including a first conductivity type high impurity concentration semiconductor and a region including a first conductivity type low impurity concentration semiconductor are provided from an ohmic layer side at the side far from a semiconductor substrate of the end surface of a barrier layer opposite the semiconductor substrate and between the ohmic layer and a gate electrode. The sheet impurity concentration of the region including a first conductivity type low impurity concentration semiconductor is set to be lower than that between the bottom surface of the gate electrode at the side of the semiconductor substrate and the end surface of the channel layer opposite the semiconductor substrate.Type: ApplicationFiled: December 13, 2002Publication date: September 11, 2003Inventors: Hiroyuki Takazawa, Shinichiro Takatani, Masao Yamane, Masayoshi Kobayashi
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Publication number: 20030102494Abstract: The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control electrode terminals are provided at least one, and a plurality of the first electrode terminals are arranged on one side and a plurality of the first electrode terminals are arranged on the other side with the control electrode terminals being interposed therebetween, wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on one side of the control electrode terminals constitute a first transistor portion, and wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on the other side of the control electrodeType: ApplicationFiled: November 12, 2002Publication date: June 5, 2003Applicant: Hitachi, Ltd.Inventors: Hitoshi Akamine, Masashi Suzuki, Masao Yamane, Tetsuaki Adachi
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Patent number: 6573540Abstract: A bipolar transistor device with a large current capacity is formed by connecting a plurality of transistor elements to each other in parallel, each transistor element having a collector layer, a base layer, and an emitter layer formed respectively in a semiconductor substrate. In the bipolar transistor device, the base layers of a plurality of the transistor elements are extended in parallel to each other and those base layers are separated from each other. In each separated base layer, a first base electrode is formed on a part of the base layer which is separated from an emitter junction with the emitter layer, and a second base electrode is formed on another portion of the base layer closer to the emitter junction than the first base electrode. To dispose the base electrodes of a plurality of the transistor elements in parallel to each other, a base wiring is connected to the first base electrodes of those elements electrically.Type: GrantFiled: December 27, 2001Date of Patent: June 3, 2003Assignee: Hitachi, Ltd.Inventors: Atsushi Kurokawa, Masao Yamane, Kazuhiro Mochizuki