Patents by Inventor Masaru Fuku

Masaru Fuku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12074082
    Abstract: A reliable semiconductor module and a reliable power conversion device using the semiconductor module are obtained. A semiconductor module includes a heat dissipation member, a semiconductor device, and a thermally conductive insulating resin sheet. The thermally conductive insulating resin sheet connects the heat dissipation member and the semiconductor device. The semiconductor device includes a semiconductor element and a metal wiring member. The metal wiring member is electrically connected to the semiconductor element. The metal wiring member includes a terminal portion protruding outside the semiconductor device. In a surface portion of the semiconductor device, a concave portion is formed outward of a partial region to which the thermally conductive insulating resin sheet is connected. The concave portion is located in a region closer to the heat dissipation member than the terminal portion.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: August 27, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Tomohisa Yamane, Hisayuki Taki, Noriyuki Besshi, Yuya Muramatsu, Masaru Fuku
  • Patent number: 11842968
    Abstract: A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: December 12, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei Yabuta, Takayuki Yamada, Yuya Muramatsu, Noriyuki Besshi, Yutaro Sugi, Hiroaki Haruna, Masaru Fuku, Atsuki Fujita
  • Publication number: 20230154820
    Abstract: A power semiconductor device includes a power module unit, an adhesive sheet, a support member, and a flow prevention frame. The adhesive sheet is bonded to the power module unit. The support member is connected to the power module unit with the adhesive sheet therebetween. The flow prevention frame is sandwiched between the power module unit and the support member, and is placed around the adhesive sheet. The adhesive sheet has an outer peripheral surface adjoining an inner peripheral surface of the flow prevention frame. A value obtained by dividing a maximum value of the internal pressure on the outer peripheral surface by a minimum value of the internal pressure is less than or equal to 10.
    Type: Application
    Filed: April 10, 2020
    Publication date: May 18, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tomohisa YAMANE, Takashi NISHIMURA, Hiroshi KOBAYASHI, Tatsushi MORISADA, Masaru FUKU
  • Patent number: 11430721
    Abstract: Two semiconductor elements and a capacitive element are located at vertices of a triangle. A first shortest path between the semiconductor elements, and a second shortest path and a third shortest path between the capacitive element and the two respective semiconductor elements, satisfy (first shortest path)?(second shortest path) and ((first shortest path)2+(second shortest path)2)?(third shortest path)2.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: August 30, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Gokan, Masaru Fuku, Ryuichi Ishii
  • Publication number: 20220254738
    Abstract: A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.
    Type: Application
    Filed: April 29, 2022
    Publication date: August 11, 2022
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei YABUTA, Takayuki YAMADA, Yuya MURAMATSU, Noriyuki BESSHI, Yutaro SUGI, Hiroaki HARUNA, Masaru FUKU, Atsuki FUJITA
  • Publication number: 20220208636
    Abstract: A reliable semiconductor module and a reliable power conversion device using the semiconductor module are obtained. A semiconductor module includes a heat dissipation member, a semiconductor device, and a thermally conductive insulating resin sheet. The thermally conductive insulating resin sheet connects the heat dissipation member and the semiconductor device. The semiconductor device includes a semiconductor element and a metal wiring member. The metal wiring member is electrically connected to the semiconductor element. The metal wiring member includes a terminal portion protruding outside the semiconductor device. In a surface portion of the semiconductor device, a concave portion is formed outward of a partial region to which the thermally conductive insulating resin sheet is connected. The concave portion is located in a region closer to the heat dissipation member than the terminal portion.
    Type: Application
    Filed: June 6, 2019
    Publication date: June 30, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tomohisa YAMANE, Hisayuki TAKI, Noriyuki BESSHI, Yuya MURAMATSU, Masaru FUKU
  • Patent number: 11342281
    Abstract: A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: May 24, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei Yabuta, Takayuki Yamada, Yuya Muramatsu, Noriyuki Besshi, Yutaro Sugi, Hiroaki Haruna, Masaru Fuku, Atsuki Fujita
  • Publication number: 20210384112
    Abstract: Two semiconductor elements and a capacitive element are located at vertices of a triangle. A first shortest path between the semiconductor elements, and a second shortest path and a third shortest path between the capacitive element and the two respective semiconductor elements, satisfy (first shortest path)?(second shortest path) and ((first shortest path)2+(second shortest path)2)?(third shortest path)2.
    Type: Application
    Filed: January 26, 2021
    Publication date: December 9, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroshi GOKAN, Masaru FUKU, Ryuichi ISHII
  • Publication number: 20200251423
    Abstract: A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.
    Type: Application
    Filed: October 25, 2018
    Publication date: August 6, 2020
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei YABUTA, Takayuki YAMADA, Yuya MURAMATSU, Noriyuki BESSHI, Yutaro SUGI, Hiroaki HARUNA, Masaru FUKU, Atsuki FUJITA
  • Patent number: 10727167
    Abstract: This power semiconductor device is provided with: a substrate; and a semiconductor element which is bonded onto the substrate using a sinterable metal bonding material. The semiconductor element comprises: a base; a first conductive layer that is provided on a first surface of the base, said first surface being on the substrate side; and a second conductive layer that is provided on a second surface of the base, said second surface being on the reverse side of the first surface. The thickness of the first conductive layer is from 0.5 times to 2.0 times (inclusive) the thickness of the second conductive layer.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: July 28, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki Yamada, Noriyuki Besshi, Yuya Muramatsu, Masaru Fuku, Dai Nakajima
  • Patent number: 10727189
    Abstract: Provided is a power semiconductor device including a signal terminal and a power semiconductor element. The power semiconductor element is arranged on a substrate. The signal terminal includes a main body portion and a joint portion, and a part of the signal terminal is held by a terminal block. The joint portion includes a distal end portion and a base portion. The distal end portion includes a pad portion that is exposed from the terminal block and connected to a signal line. The base portion includes a thin portion in which a thickness in a vertical direction is set to be smaller than that of the pad portion. The thin portion has an upper surface that is formed at a position lower than an upper surface of the pad portion and is covered with a resin material forming the terminal block.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: July 28, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Noriyuki Besshi, Ryuichi Ishii, Masaru Fuku, Yuji Fujimoto, Yusuke Hirata
  • Patent number: 10553559
    Abstract: Provided is a power semiconductor device which is able to have improved connection reliability between a wiring line and an electrode of a power semiconductor element in comparison to conventional power semiconductor devices. This power semiconductor device is provided with: a semiconductor element; an insulating substrate having an electrode layer to which the semiconductor element is bonded; an external wiring line which is solder bonded to an upper surface electrode of the semiconductor element and has an end portion for external connection, said end portion being bent toward the upper surface; and a frame member which is affixed to the electrode layer of the insulating substrate. The frame member has a fitting portion that is fitted with the end portion for external connection; and the external wiring line has at least two projected portions that protrude toward the semiconductor element.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: February 4, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Noriyuki Besshi, Ryuichi Ishii, Masaru Fuku, Takayuki Yamada, Takao Mitsui
  • Publication number: 20190343015
    Abstract: A power semiconductor device includes: a plurality of power modules including control terminals; a heat sink, on which the plurality of power modules are mounted; and a control substrate, to which the control terminals are fixed. The plurality of power modules each include a first protruding portion close to the control terminals, and a second protruding portion far from the control terminals. The heat sink has, at a position corresponding to the first protruding portion, a first recessed portion formed to have an inner diameter larger than an outer diameter of the first protruding portion, and engaged with the first protruding portion. At a position corresponding to the second protruding portion, the heat sink has a second recessed portion formed to have the shape of an elongated hole whose minor diameter is larger than an outer diameter of the second protruding portion, and engaged with the second protruding portion.
    Type: Application
    Filed: November 30, 2017
    Publication date: November 7, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Noriyuki BESSHI, Ryuichi ISHII, Masaru FUKU, Kazuya FUKUHARA
  • Patent number: 10403559
    Abstract: In a power semiconductor device, the thickness dimension of a protective film of a semiconductor element is made smaller than that of an upper electrode, so a protective film is not pressed by being pressurized from upward when bonded by a metal sintered body, and the force of tearing off the upper electrode riding on an inclined surface of the protective film does not act, so that no crack of the upper electrode occurs, thus maintaining the soundness of the semiconductor element. Also, a lead bonded by a solder to the upper electrode of the semiconductor element is made of a copper-Invar clad material, the linear expansion coefficient of which is optimized, and thereby it is possible to realize a durability superior to that of a heretofore known wire-bonded aluminum wiring.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: September 3, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masaru Fuku, Noriyuki Besshi, Ryuichi Ishii, Takayuki Yamada, Takao Mitsui, Komei Hayashi
  • Publication number: 20190206811
    Abstract: Provided is a power semiconductor device including a signal terminal and a power semiconductor element. The power semiconductor element is arranged on a substrate. The signal terminal includes a main body portion and a joint portion, and a part of the signal terminal is held by a terminal block. The joint portion includes a distal end portion and a base portion. The distal end portion includes a pad portion that is exposed from the terminal block and connected to a signal line. The base portion includes a thin portion in which a thickness in a vertical direction is set to be smaller than that of the pad portion. The thin portion has an upper surface that is formed at a position lower than an upper surface of the pad portion and is covered with a resin material forming the terminal block.
    Type: Application
    Filed: August 28, 2017
    Publication date: July 4, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Noriyuki Besshi, Ryuichi Ishii, Masaru Fuku, Yuji Fujimoto, Yusuke Hirata
  • Publication number: 20190074236
    Abstract: In a power semiconductor device, the thickness dimension of a protective film of a semiconductor element is made smaller than that of an upper electrode, so a protective film is not pressed by being pressurized from upward when bonded by a metal sintered body, and the force of tearing off the upper electrode riding on an inclined surface of the protective film does not act, so that no crack of the upper electrode occurs, thus maintaining the soundness of the semiconductor element. Also, a lead bonded by a solder to the upper electrode of the semiconductor element is made of a copper-Invar clad material, the linear expansion coefficient of which is optimized, and thereby it is possible to realize a durability superior to that of a heretofore known wire-bonded aluminum wiring.
    Type: Application
    Filed: May 26, 2016
    Publication date: March 7, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masaru FUKU, Noriyuki BESSHI, Ryuichi ISHII, Takayuki YAMADA, Takao MITSUI, Komei HAYASHI
  • Publication number: 20190006265
    Abstract: This power semiconductor device is provided with: a substrate; and a semiconductor element which is bonded onto the substrate using a sinterable metal bonding material. The semiconductor element comprises: a base; a first conductive layer that is provided on a first surface of the base, said first surface being on the substrate side; and a second conductive layer that is provided on a second surface of the base, said second surface being on the reverse side of the first surface. The thickness of the first conductive layer is from 0.5 times to 2.0 times (inclusive) the thickness of the second conductive layer.
    Type: Application
    Filed: January 6, 2017
    Publication date: January 3, 2019
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki Yamada, Noriyuki Besshi, Yuya Muramatsu, Masaru Fuku, Dai Nakajima
  • Publication number: 20180197838
    Abstract: Provided is a power semiconductor device which is able to have improved connection reliability between a wiring line and an electrode of a power semiconductor element in comparison to conventional power semiconductor devices. This power semiconductor device is provided with: a semiconductor element; an insulating substrate having an electrode layer to which the semiconductor element is bonded; an external wiring line which is solder bonded to an upper surface electrode of the semiconductor element and has an end portion for external connection, said end portion being bent toward the upper surface; and a frame member which is affixed to the electrode layer of the insulating substrate. The frame member has a fitting portion that is fitted with the end portion for external connection; and the external wiring line has at least two projected portions that protrude toward the semiconductor element.
    Type: Application
    Filed: September 29, 2016
    Publication date: July 12, 2018
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Noriyuki BESSHI, Ryuichi ISHII, Masaru FUKU, Takayuki YAMADA, Takao MITSUI
  • Patent number: 8427225
    Abstract: To obtain a gate driving circuit in which rising of a constant current of a constant current circuit is fast and power saving is achieved, the gate driving circuit includes: a constant current driving circuit (28) for supplying a constant current; a gate terminal of a power semiconductor element (1), which is connected to an output terminal of the constant current driving circuit; a comparator (22) for comparing a voltage at the gate terminal with a predetermined voltage value and outputting a signal indicating that the voltage is higher than the predetermined voltage value; and a driving control section (20) for increasing a current from the constant current driving circuit in response to a signal for turning on the power semiconductor element, and reducing the current from the constant current driving circuit in response to the signal from the comparator.
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: April 23, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Nakatake, Masaru Fuku, Tatsuya Okuda, Yoshikazu Tsunoda
  • Patent number: 8138818
    Abstract: A gate drive apparatus including a constant-current-pulse gate drive circuit which creates a gate signal for a switching device as a constant-current output, a constant-voltage-pulse gate drive circuit which creates the gate signal as a constant-voltage output, and a decision/switch circuit which switches the operation of the constant-current-pulse gate drive circuit and the operation of the constant-voltage-pulse gate drive circuit. The variance of switching speeds attributed to the variances of threshold voltages and mirror voltages in a plurality of switching devices which are driven by the gate drive apparatus can be suppressed, and the variance of losses can be minimized.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: March 20, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshikazu Tsunoda, Tatsuya Okuda, Masaru Fuku