Patents by Inventor Masaru KASE

Masaru KASE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9841973
    Abstract: An information processing apparatus includes a plurality of arithmetic processing devices, a common timer unit configured to measure time in common among the plurality of arithmetic processing devices, a plurality of individual timer units to measure execution time of a program per plurality of arithmetic processing devices, a comparing unit configured to compare the program execution time of each of the plurality of arithmetic processing devices, the program execution time being measured by the plurality of individual timer units, with time measured by the common timer unit, and a control unit configured to control processing of the plurality of arithmetic processing devices on the basis of a result of the comparison made by the comparing unit.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: December 12, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Masaru Kase, Toshiyuki Shimizu
  • Patent number: 9830195
    Abstract: An apparatus includes an arbiter and a plurality of arithmetic processors, each including an arithmetic circuit and a measuring circuit. The arithmetic circuit executes an arithmetic process, and the measuring circuit measures a progress level indicating a progress of the arithmetic process executed by the arithmetic circuit. Upon receiving access requests to an external device from first arithmetic processors included in the plurality of arithmetic processors, the arbiter arbitrates the access requests, based on a result of comparing the progress levels measured by the measuring circuits of the first arithmetic processors.
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: November 28, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Yuki Yoshida, Masaru Kase, Toshiyuki Shimizu
  • Patent number: 9468132
    Abstract: A heat-receiving device includes: a plurality of heat receivers into which a refrigerant flows; a series path that comprises a connection path connecting adjacent heat receivers among the plurality of heat receivers, that connects the plurality of heat receivers in series, and into which the refrigerant flows; a bypass path that is not connected to the plurality of heat receivers, and into which the refrigerant flows; a branch path that connects the connection path and the bypass path, and into which the refrigerant flows; and a throttle valve that is provided in the connection path on an upstream side with respect to a connection point of the connection path and the branch path, and that reduces a flow rate at which the refrigerant flows into the connection path as a temperature of the refrigerant flowing into the connection path decreases.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: October 11, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Jun Taguchi, Masaru Kase
  • Publication number: 20150281094
    Abstract: A data reception apparatus including a reception unit, a calculation unit, a determination unit and a notification unit. The reception unit receives a transmission announcement announcing transmission of data from a data transmission apparatus that transmits data. The calculation unit calculates a predicted use amount of a reception buffer that stores reception data on the basis of a current use amount of the reception buffer and an advance reservation amount indicating an amount of unreceived data among the data of which the transmission announcement is received that when the transmission announcement is received by the reception unit. The determination unit determines whether the predicted use amount calculated by the calculation unit exceeds a predetermined threshold. The notification unit notifies the data transmission apparatus of a stop of data transmission when the determination unit determines that the predicted use amount exceeds the predetermined threshold.
    Type: Application
    Filed: February 23, 2015
    Publication date: October 1, 2015
    Inventors: Masaru KASE, Yuki YOSHIDA
  • Publication number: 20150124406
    Abstract: A heat-receiving device includes: a plurality of heat receivers into which a refrigerant flows; a series path that comprises a connection path connecting adjacent heat receivers among the plurality of heat receivers, that connects the plurality of heat receivers in series, and into which the refrigerant flows; a bypass path that is not connected to the plurality of heat receivers, and into which the refrigerant flows; a branch path that connects the connection path and the bypass path, and into which the refrigerant flows; and a throttle valve that is provided in the connection path on an upstream side with respect to a connection point of the connection path and the branch path, and that reduces a flow rate at which the refrigerant flows into the connection path as a temperature of the refrigerant flowing into the connection path decreases.
    Type: Application
    Filed: January 15, 2015
    Publication date: May 7, 2015
    Applicant: FUJITSU LIMITED
    Inventors: Jun TAGUCHI, Masaru KASE
  • Publication number: 20150095622
    Abstract: An apparatus includes an arbiter and a plurality of arithmetic processors, each including an arithmetic circuit and a measuring circuit. The arithmetic circuit executes an arithmetic process, and the measuring circuit measures a progress level indicating a progress of the arithmetic process executed by the arithmetic circuit. Upon receiving access requests to an external device from first arithmetic processors included in the plurality of arithmetic processors, the arbiter arbitrates the access requests, based on a result of comparing the progress levels measured by the measuring circuits of the first arithmetic processors.
    Type: Application
    Filed: September 3, 2014
    Publication date: April 2, 2015
    Applicant: FUJITSU LIMITED
    Inventors: Yuki Yoshida, Masaru Kase, Toshiyuki Shimizu
  • Publication number: 20150067304
    Abstract: An information processing apparatus includes a plurality of arithmetic processing devices, a common timer unit configured to measure time in common among the plurality of arithmetic processing devices, a plurality of individual timer units to measure execution time of a program per plurality of arithmetic processing devices, a comparing unit configured to compare the program execution time of each of the plurality of arithmetic processing devices, the program execution time being measured by the plurality of individual timer units, with time measured by the common timer unit, and a control unit configured to control processing of the plurality of arithmetic processing devices on the basis of a result of the comparison made by the comparing unit.
    Type: Application
    Filed: July 30, 2014
    Publication date: March 5, 2015
    Inventors: Masaru KASE, Toshiyuki SHIMIZU