Patents by Inventor Masaru Kodato

Masaru Kodato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device including output buffer and control circuit adjusting an impedance of the output buffer
    Patent number: 7952383
    Abstract: There is provided a semiconductor device that includes: an output buffer capable of adjusting an impedance based on an impedance adjustment signal, and a through-rate control circuit that adjusts a through rate of the output buffer based on at least the impedance adjustment signal, wherein the through-rate control circuit sets a relatively high through rate when the impedance adjustment signal designates a relatively low impedance, and sets a relatively low through rate when the impedance adjustment signal designates a relatively high impedance.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: May 31, 2011
    Assignee: Elpida Memory, Inc.
    Inventor: Masaru Kodato
  • Semiconductor device and data processing system including the same
    Publication number: 20100045338
    Abstract: There is provided a semiconductor device that includes: an output buffer capable of adjusting an impedance based on an impedance adjustment signal, and a through-rate control circuit that adjusts a through rate of the output buffer based on at least the impedance adjustment signal, wherein the through-rate control circuit sets a relatively high through rate when the impedance adjustment signal designates a relatively low impedance, and sets a relatively low through rate when the impedance adjustment signal designates a relatively high impedance.
    Type: Application
    Filed: August 21, 2009
    Publication date: February 25, 2010
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Masaru Kodato