Patents by Inventor Masaru Koga

Masaru Koga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11982550
    Abstract: Provided is an encoder capable of achieving high position resolution without being finely divided, and capable of detecting a rotation angle or the like with high sensitivity. The encoder includes: rotary plate having a plurality of reflection structures repeatedly formed and code including light reflector; irradiator that irradiates the plurality of reflection structures with light; and light receiver that receives light reflected by the plurality of reflection structures. Each of the plurality of reflection structures has a surface in a convex shape, and each of the plurality of reflection structures has a width that is an integral multiple of a width of light reflector.
    Type: Grant
    Filed: October 4, 2021
    Date of Patent: May 14, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shuichi Nagai, Masaru Shiraishi, Junya Aso, Toshihiro Koga, Takuma Katayama
  • Publication number: 20180246789
    Abstract: An information processing apparatus described herein includes a hard disk drive device and a controller. The controller is configured to carry out a self-diagnostic test regarding the operation states of the hard disk drive device, output result information of the self-diagnostic test, acquire failure determination information of the hard disk drive device which is different from the result information, and determine whether it is time to replace the hard disk drive device based on the failure determination information and the result information of the self-diagnostic test.
    Type: Application
    Filed: February 24, 2017
    Publication date: August 30, 2018
    Inventor: Masaru KOGA
  • Patent number: 8451471
    Abstract: An image forming apparatus includes: a power-saving-mode determining unit configured to determine, on the basis of at least an operation state of a processor, to which power saving mode of a sleep mode in which power supply to at least a fixing device is stopped and a super sleep mode in which a power supply for the processor is turned off and power consumption is lower than that in the sleep mode the image forming apparatus transitions.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: May 28, 2013
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
    Inventor: Masaru Koga
  • Publication number: 20100257394
    Abstract: An image forming apparatus includes: a power-saving-mode determining unit configured to determine, on the basis of at least an operation state of a processor, to which power saving mode of a sleep mode in which power supply to at least a fixing device is stopped and a super sleep mode in which a power supply for the processor is turned off and power consumption is lower than that in the sleep mode the image forming apparatus transitions.
    Type: Application
    Filed: April 6, 2010
    Publication date: October 7, 2010
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Masaru Koga
  • Publication number: 20100177889
    Abstract: An encryption process control technique is provided which can reduce the power consumption in an image forming apparatus including an exclusive circuit for an encryption process. The image forming apparatus includes: a first encryption processor mounted as hardware to perform a data encrypting process; a second encryption processor mounted as software to perform a data encrypting process; a process controller determining which of the first encryption processor and the second encryption processor should be used to perform a data encryption process; and a power supply restrictor stopping or decreasing a supply of power to the first encryption processor when the process controller determines that the second encryption processor is used to perform the encryption process.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 15, 2010
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Masaru Koga
  • Patent number: 7715040
    Abstract: An image processing apparatus selectively sets a feature of securing the confidentiality of real data indicated by allocation data by an enabler attached to the apparatus when the real data left in a storage device are no longer necessary. The image processing apparatus (100) stores in a memory (11) an erasing program for erasing used data in an HDD (19). After executing an image forming process using the data in the HDD 19, if it is detected that an enabler (1) is inserted into an USB interface 20 to lift the restriction on the use of the erasing program, a CPU (10) deletes the allocation data for the unnecessary data and starts the erasing program to overwrite/erase the corresponding real data to secure the confidentiality of the real data. If otherwise, the CPU (10) does not overwrite/erase the real data.
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: May 11, 2010
    Assignees: Kabushiki Kaisha Toshiba, Toshiba TEC Kabushiki Kaisha
    Inventors: Koichi Shimoda, Masaru Koga
  • Publication number: 20060152751
    Abstract: There is disclosed an image processing apparatus adapted to selectively set a feature of securing the confidentiality of the real data indicated by allocation data by attaching an enabler to the apparatus when the video data left in a storage device are unnecessary. The image processing apparatus 100 stores in a memory 11 in advance an erasing program for erasing used video data in an HDD 19. After executing an image forming process, using the video data of the HDD 19 and if it is detected that an enabler 1 is inserted into the USB interface 20 to lift the restriction (prohibition?) of the use of the erasing program, a CPU 10 deletes the allocation data for the unnecessary data and starts the erasing program to overwrite/erase the corresponding real data to secure the confidentiality of the real data. If otherwise, however, the CPU 10 does not overwrite/erase the real data.
    Type: Application
    Filed: September 19, 2005
    Publication date: July 13, 2006
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
    Inventors: Koichi Shimoda, Masaru Koga
  • Publication number: 20060156058
    Abstract: There is disclosed a technique that can reliably erase data to achieve an enhanced level of security, while suppressing the problem of low operability and that of poor response of some other process due to an increased load.
    Type: Application
    Filed: September 19, 2005
    Publication date: July 13, 2006
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
    Inventors: Masaru Koga, Toshiharu Takahashi