Patents by Inventor Masaru Kokubo
Masaru Kokubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240120147Abstract: A flat coil comprises a coil main portion having a flat shape; a lead portion drawn out from the coil main portion; and a heat-dissipating portion provided to the coil main portion at a location different from where the lead portion is drawn out from the coil main portion, the heat-dissipating portion meeting the coil main portion at a predetermined angle.Type: ApplicationFiled: October 4, 2023Publication date: April 11, 2024Applicant: TDK CORPORATIONInventors: Masaru KUMAGAI, Shinichiro KOKUBO, Ge LI
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Patent number: 11618462Abstract: Provided is an in-vehicle control system capable of reducing an increase in cost accompanying advancement of a fallback operation. Therefore, the in-vehicle control system includes: a plurality of control circuits 3 and 4 respectively including control units that perform data communication with each other; an external environment recognition sensor a5; and a plurality of wirings 11, 12, 13, and 14 connecting the external environment recognition sensor a5 and the plurality of control circuits 3 and 4. The plurality of control circuits 3 and 4 include: a first power supply unit that supplies power to the external environment recognition sensor a5 via a corresponding wiring among the plurality of wirings 11, 12, 13, and 14; and a first detection unit that detects an abnormality related to the power supplied to the external environment recognition sensor a5.Type: GrantFiled: October 11, 2019Date of Patent: April 4, 2023Assignee: HITACHI ASTEMO, LTD.Inventors: Shigenobu Komatsu, Hiroshi Shinoda, Hideyuki Sakamoto, Masaru Kokubo, Hidetatsu Yamamoto
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Publication number: 20220222506Abstract: An information processing device includes a parallel deep neural network configured to input a captured image of an article to deep neural network models respectively corresponding to a plurality of articles and perform inferences about the plurality of articles in parallel using the deep neural network models, a new article determination unit configured to determine whether an article included in the image is an unlearned article based on learned model information about the articles and the image, and a new article learning unit configured to learn a deep neural network model corresponding to the article determined to be unlearned based on the image and initial model configuration information about the deep neural network model when the article included in the image is determined to be an unlearned article. The new article learning unit adds the learned deep neural network model to the deep neural network models.Type: ApplicationFiled: October 29, 2021Publication date: July 14, 2022Inventors: Takashi OSHIMA, Goichi ONO, Tadashi KISHIMOTO, Masaru KOKUBO
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Publication number: 20220017108Abstract: Provided is an in-vehicle control system capable of reducing an increase in cost accompanying advancement of a fallback operation. Therefore, the in-vehicle control system includes: a plurality of control circuits 3 and 4 respectively including control units that perform data communication with each other; an external environment recognition sensor a5; and a plurality of wirings 11, 12, 13, and 14 connecting the external environment recognition sensor a5 and the plurality of control circuits 3 and 4. The plurality of control circuits 3 and 4 include: a first power supply unit that supplies power to the external environment recognition sensor a5 via a corresponding wiring among the plurality of wirings 11, 12, 13, and 14; and a first detection unit that detects an abnormality related to the power supplied to the external environment recognition sensor a5.Type: ApplicationFiled: October 11, 2019Publication date: January 20, 2022Applicant: Hitachi Astemo, Ltd.Inventors: Shigenobu KOMATSU, Hiroshi SHINODA, Hideyuki SAKAMOTO, Masaru KOKUBO, Hidetatsu YAMAMOTO
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Patent number: 11054285Abstract: A detection device has a pinching sensor and a detecting unit. The pinching sensor has a dielectric layer in which a linear conductor layer is formed, and conductor layers arranged on top and bottom surfaces of the dielectric layer, a slit being formed on at least one of the conductor layers arranged on the top and bottom surfaces. The detecting unit supplies a high-frequency signal to an input portion of the linear conductor layer, generates an electric field around a slit portion of the conductor layer on which the slit is formed, and detects a change in a reflection coefficient at the input portion, the change being caused by a change of the electric field generated by interference with a detected object.Type: GrantFiled: July 26, 2019Date of Patent: July 6, 2021Assignee: HITACHI METALS, LTD.Inventors: Yasuyuki Okuma, Masaru Kokubo
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Patent number: 10690696Abstract: A servo control signal is binarized using a digital delta-sigma modulator. The digital delta-sigma modulator forms a feedback loop including a digital adder/subtractor, a digital integrator, and a one-bit quantizer to perform pulse-density modulation of the input servo control signal and output the signal as a binary value of +1 or ?1.Type: GrantFiled: September 26, 2018Date of Patent: June 23, 2020Assignee: HITACHI, LTD.Inventors: Takashi Oshima, Masaru Kokubo, Yuki Furubayashi
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Publication number: 20200033162Abstract: A detection device has a pinching sensor and a detecting unit. The pinching sensor has a dielectric layer in which a linear conductor layer is formed, and conductor layers arranged on top and bottom surfaces of the dielectric layer, a slit being formed on at least one of the conductor layers arranged on the top and bottom surfaces. The detecting unit supplies a high-frequency signal to an input portion of the linear conductor layer, generates an electric field around a slit portion of the conductor layer on which the slit is formed, and detects a change in a reflection coefficient at the input portion, the change being caused by a change of the electric field generated by interference with a detected object.Type: ApplicationFiled: July 26, 2019Publication date: January 30, 2020Applicant: HITACHI METALS, LTD.Inventors: Yasuyuki OKUMA, Masaru KOKUBO
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Publication number: 20190212358Abstract: A servo control signal is binarized using a digital delta-sigma modulator. The digital delta-sigma modulator forms a feedback loop including a digital adder/subtractor, a digital integrator, and a one-bit quantizer to perform pulse-density modulation of the input servo control signal and output the signal as a binary value of +1 or ?1.Type: ApplicationFiled: September 26, 2018Publication date: July 11, 2019Inventors: Takashi OSHIMA, Masaru KOKUBO, Yuki FURUBAYASHI
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Patent number: 10298426Abstract: There is disclosed a communication cable module including: a conductive cable; a linear amplifier connected to the conductive cable; a detector for detecting presence or absence of an input signal of the conductive cable; a first circuit having a variable-current function; and a second circuit having a common-mode voltage regulating function, wherein when the input signal is not present, the variable-current function of the first circuit reduces an output current of the linear amplifier and the common-mode voltage regulating function of the second circuit regulates an output common-mode voltage of the linear amplifier.Type: GrantFiled: November 16, 2017Date of Patent: May 21, 2019Assignee: Hitachi Metals, Ltd.Inventors: Koji Maeda, Izumi Fukasaku, Masaru Kokubo
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Publication number: 20180167242Abstract: There is disclosed a communication cable module including: a conductive cable; a linear amplifier connected to the conductive cable; a detector for detecting presence or absence of an input signal of the conductive cable; a first circuit having a variable-current function; and a second circuit having a common-mode voltage regulating function, wherein when the input signal is not present, the variable-current function of the first circuit reduces an output current of the linear amplifier and the common-mode voltage regulating function of the second circuit regulates an output common-mode voltage of the linear amplifier.Type: ApplicationFiled: November 16, 2017Publication date: June 14, 2018Applicant: HITACHI METALS, LTD.Inventors: Koji MAEDA, Izumi FUKASAKU, Masaru KOKUBO
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Patent number: 8755296Abstract: A wireless communication device includes a sensor processing unit that generates sensor data including a measurement result acquired by a sensor; a communication measurement unit that generates communication quality data including a communication state for transmitting a packet; a compression determination unit that determines compression rates of first sensor data and first communication quality data according to the contents of the first sensor data including the transmitted sensor data and the generated sensor data or the contents of the first communication quality data including the transmitted sensor data and the generated communication quality data; a compression unit that compresses the first sensor data and the first communication quality data according to the determined compression rates; and a wireless communication unit that transmits a packet including the compressed first sensor data and the compressed first communication quality data to another wireless communication device or the access point.Type: GrantFiled: December 1, 2011Date of Patent: June 17, 2014Assignee: Hitachi, Ltd.Inventors: Masayuki Miyazaki, Kenichi Mizugaki, Masaru Kokubo, Hideyuki Nagaishi, Nobuhisa Kobayashi
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Publication number: 20120155301Abstract: A wireless communication device includes a sensor processing unit that generates sensor data including a measurement result acquired by a sensor; a communication measurement unit that generates communication quality data including a communication state for transmitting a packet; a compression determination unit that determines compression rates of first sensor data and first communication quality data according to the contents of the first sensor data including the transmitted sensor data and the generated sensor data or the contents of the first communication quality data including the transmitted sensor data and the generated communication quality data; a compression unit that compresses the first sensor data and the first communication quality data according to the determined compression rates; and a wireless communication unit that transmits a packet including the compressed first sensor data and the compressed first communication quality data to another wireless communication device or the access point.Type: ApplicationFiled: December 1, 2011Publication date: June 21, 2012Applicant: Hitachi, Ltd.Inventors: Masayuki MIYAZAKI, Kenichi Mizugaki, Masaru Kokubo, Hideyuki Nagaishi, Nobuhisa Kobayashi
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Patent number: 8179733Abstract: A clock-generating circuit for forming internal clock signals by comparing a signal obtained by delaying, through a variable delay circuit, an input clock signal input through an external terminal with the input clock signal through a phase comparator circuit, and so controlling the delay time of the variable delay circuit that they are brought into agreement with each other, wherein the clock-generating circuit and an internal circuit to be operated by the clock signals formed thereby are formed on a common semiconductor substrate, and an element-forming region in which the clock-generating circuit is formed is electrically isolated from an element-forming region in which the digital circuit is constituted on the semiconductor substrate relying upon the element-isolation technology. The power-source passages, too, are formed independently of other digital circuits.Type: GrantFiled: April 6, 2011Date of Patent: May 15, 2012Assignee: Renesas Electronics CorporationInventors: Yuichi Okuda, Masaru Kokubo, Yoshinobu Nakagome, Hideharu Yahata, Hiroki Miyashita
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Publication number: 20110310748Abstract: A wireless communication system provides high reliability wireless communications even when large scale interference affecting the entire system has occurred in ad hoc wireless communication systems. The node, access point, and intermediate nodes are each equipped with multiple wireless standards, and notify a wireless communication control device called a coordinator that sets the network communication paths with communication path information obtained by measuring the state of communication paths in the vicinity of their own respective nodes. The coordinator that now knows the communication status, issues instructions for setting plural routes using multiple wireless standards between the node and the access points as well as which wireless standard to use to implement communications between each intermediate zone, and each intermediate node conveys the measurement data while complying with those instructions.Type: ApplicationFiled: June 16, 2011Publication date: December 22, 2011Inventors: Kenichi MIZUGAKI, Masaru Kokubo, Masayuki Miyazaki
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Publication number: 20110182127Abstract: A clock-generating circuit for forming internal clock signals by comparing a signal obtained by delaying, through a variable delay circuit, an input clock signal input through an external terminal with the input clock signal through a phase comparator circuit, and so controlling the delay time of the variable delay circuit that they are brought into agreement with each other, wherein the clock-generating circuit and an internal circuit to be operated by the clock signals formed thereby are formed on a common semiconductor substrate, and an element-forming region in which the clock-generating circuit is formed is electrically isolated from an element-forming region in which the digital circuit is constituted on the semiconductor substrate relying upon the element-isolation technology. The power-source passages, too, are formed independently of other digital circuits.Type: ApplicationFiled: April 6, 2011Publication date: July 28, 2011Inventors: YUICHI OKUDA, Masaru Kokubo, Yoshinobu Nakagome, Hideharu Yahata, Hiroki Miyashita
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Patent number: 7936621Abstract: A clock-generating circuit for forming internal clock signals by comparing a signal obtained by delaying, through a variable delay circuit, an input clock signal input through an external terminal with the input clock signal through a phase comparator circuit, and so controlling the delay time of the variable delay circuit that they are brought into agreement with each other, wherein the clock-generating circuit and an internal circuit to be operated by the clock signals formed thereby are formed on a common semiconductor substrate, and an element-forming region in which the clock-generating circuit is formed is electrically isolated from an element-forming region in which the digital circuit is constituted on the semiconductor substrate relying upon the element-isolation technology. The power-source passages, too, are formed independently of other digital circuits.Type: GrantFiled: October 12, 2009Date of Patent: May 3, 2011Assignee: Renesas Electronics CorporationInventors: Yuichi Okuda, Masaru Kokubo, Yoshinobu Nakagome, Hideharu Yahata, Hiroki Miyashita
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Patent number: 7808397Abstract: A sensor transmits and receives wireless signals at intervals. A sensor unit, a processor 130, a wireless transmitter circuit, and a wireless receiver circuit are activated in sequence only for a fixed time when the electric power generated by a generator circuit and charged in a capacitor reaches a preset level. Sensing information detected by the sensor unit is processed by the processor circuit and, information on the number of receivable bytes is added to the processing results in the wireless receiver circuit. This added information is sent as sensor information to the wireless host from the wireless transmitting circuit, and the wireless receiver circuit that activated after the wireless transmitter circuit was activated, receives a control information signal from the wireless host. This received information is processed in the processor circuit.Type: GrantFiled: July 3, 2007Date of Patent: October 5, 2010Assignee: Hitachi, Ltd.Inventors: Hiroshi Arita, Masaru Kokubo, Kenichi Mizugaki
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Patent number: 7737792Abstract: To provide a phase locked loop circuit that is capable of performing an automatic adjustment that satisfies a desired characteristic not depending on a process variation and an environmental variation. The phase locked loop circuit has a phase frequency comparator, a charge pump, a loop filter, a frequency divider, a selector, and a voltage controlled oscillator. The frequency divider inputs an output signal and a reference signal, divides the output signal, and outputs a feedback signal, and also outputs a select signal, a trimming signal, and a limit signal from the output signal. The voltage controlled oscillator inputs the control voltage, the base voltage, the trimming signal, and the limit signal, changes the output signal frequency according to the control voltage so as to limit the upper limit frequency of the output signal.Type: GrantFiled: January 29, 2009Date of Patent: June 15, 2010Assignee: Renesas Technology Corp.Inventors: Takashi Kawamoto, Masaru Kokubo
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Patent number: 7664161Abstract: A pulse generator for UWB transmission, lower power consumption, and suppression of LO leakage by nonuse of the LO signal. The pulse generator includes a clock generator (CLK) for giving clock of a predetermined period; a delay circuit (DLY) equipped with a function of controlling a delay time and for delaying the clock; a square-wave pulse generation circuit (SWPG) that receives information being spread by a spread code and modulates phases of square wave pulses that have a pulse width corresponding to a differential delay for one stage of the delay circuit; and an amplitude control unit (AMPC) that outputs an impulse sequence having the pulse width of the square wave in a predetermined amplitude and combines the impulses; and outputs pulses that have a predetermined envelope form.Type: GrantFiled: January 19, 2006Date of Patent: February 16, 2010Assignee: Renesas Technology Corp.Inventors: Takayasu Norimatsu, Ryosuke Fujiwara, Masaru Kokubo, Akira Maeki
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Publication number: 20100027369Abstract: A clock-generating circuit for forming internal clock signals by comparing a signal obtained by delaying, through a variable delay circuit, an input clock signal input through an external terminal with the input clock signal through a phase comparator circuit, and so controlling the delay time of the variable delay circuit that they are brought into agreement with each other, wherein the clock-generating circuit and an internal circuit to be operated by the clock signals formed thereby are formed on a common semiconductor substrate, and an element-forming region in which the clock-generating circuit is formed is electrically isolated from an element-forming region in which the digital circuit is constituted on the semiconductor substrate relying upon the element-isolation technology. The power-source passages, too, are formed independently of other digital circuits.Type: ApplicationFiled: October 12, 2009Publication date: February 4, 2010Inventors: Yuichi OKUDA, Masaru KOKUBO, Yoshinobu NAKAGOME, Hideharu YAHATA, Hiroki MIYASHITA