Patents by Inventor Masaru Matsui

Masaru Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7295550
    Abstract: A data communication function table relating to communication functions is shared between devices. Whether a communication device can operate in an autonomous communication mode or request/response communication mode can be therefore determined, the data type can be determined, the data size and data identification information can be acquired, and a file can be divided to an optimum size for transmission. Network traffic is therefore reduced and the effective communication speed is improved for data communication between devices over a network.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: November 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Noriko Shimba, Masaru Matsui
  • Publication number: 20050142405
    Abstract: Heretofore, in a dispersed energy supplying system, the unit cost of energy generated in houses and the unit rate of energy bought from an electric power company, etc. have been compared, but consideration has never been made of environmental burden.
    Type: Application
    Filed: March 5, 2003
    Publication date: June 30, 2005
    Inventors: Sachio Nagamitsu, Masaru Matsui, Shigeaki Matsubayashi
  • Publication number: 20050107892
    Abstract: In the case where a user changes a set state of apparatuses, an apparatus operation control portion repressively controls the apparatuses, in spite of an instruction of a control signal according to that change, so that an increasing amount of power consumption of the apparatuses obtained from an apparatus power consumption measuring portion will not exceed an increasing amount of the generating capacity of a generator obtained from a generating capacity measuring portion so as to gradually bring it closer to a target set state set up by the user.
    Type: Application
    Filed: November 19, 2004
    Publication date: May 19, 2005
    Inventors: Masaru Matsui, Kazuhiro Nishitani, Eiji Noguchi
  • Publication number: 20040254686
    Abstract: The present invention prepares air-conditioner energy consumption as teacher data in the case three indices of solar radiation amount, heat conduction amount, and clearance area are respectively changed; performs interpolation calculations to the air-conditioner energy consumption using said three indices; and stores the energy consumption interpolation information into the air-conditioner energy consumption interpolation information storage unit (35). The air-conditioner energy consumption calculation unit (30) calculates, based on the actual use condition inputted to the use condition input unit (10), air-conditioner energy consumption using said three factors calculated by the air-conditioner load factor calculation unit (20) and energy consumption interpolation information stored in the air-conditioner energy consumption interpolation information storage unit (35).
    Type: Application
    Filed: May 27, 2004
    Publication date: December 16, 2004
    Inventors: Masaru Matsui, Sachio Nagamitsu
  • Patent number: 6763511
    Abstract: The present invention enables to design a semiconductor integrated circuit with a small chip area and a small number of wiring layers at a low cost for a short time. In the present design method of the semiconductor integrated circuit, a first wiring group (a horizontal power wiring and horizontal ground wirings) and a second wiring group (a horizontal power wiring and horizontal ground wirings), which are opposite to each other, are arranged at the outside of a macro outer frame, a third wiring group (a vertical power wiring and a vertical ground wiring) is arranged to correspond to a power terminal and a ground terminal on a macro cell, and these first and second wiring groups are connected to the power terminal and the ground terminal by the third wiring group.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: July 13, 2004
    Assignee: NEC Electronics Corporation
    Inventors: Akihiro Banno, Shinichirou Ooshige, Masaru Shintani, Masaru Matsui
  • Patent number: 6754561
    Abstract: In a room exit determination, a determination of presence of a body in a room is made if a movement pattern vector consisting of a room ID of movement origin, a room ID of movement destination and a movement period of time is not received from the a non-specified room response sensor within a predetermined period of time. A determination of exit from the room of a body is made only when the movement period of time in the movement pattern vector agrees with a movement period of time of past exits from the room stored in the a movement time storage if this vector is received from the non-specified room response sensor.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: June 22, 2004
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Masaru Matsui, Shigeaki Matsubayashi, Sachio Nagamitsu
  • Publication number: 20030217138
    Abstract: A data communication function table relating to communication functions is shared between devices. Whether a communication device can operate in an autonomous communication mode or request/response communication mode can be therefore determined, the data type can be determined, the data size and data identification information can be acquired, and a file can be divided to an optimum size for transmission. Network traffic is therefore reduced and the effective communication speed is improved for data communication between devices over a network.
    Type: Application
    Filed: March 13, 2003
    Publication date: November 20, 2003
    Inventors: Noriko Shimba, Masaru Matsui
  • Publication number: 20030214420
    Abstract: Response pattern extracting unit 220 extracts absence detection response patterns including moving subject responses to be judged and presence detection response patterns that have symmetrical time component structures to these absence detection response patterns based on moving subject responses of moving subject detecting sensor 110 (at least one moving subject detecting sensor 110 is placed in respective rooms). Leaving room response pattern determining unit 230 adds flags showing leaving room response pattern to the above-mentioned absence detection response pattern when a response pattern extracted in response pattern extracting unit 220 includes a pair of time components that are in time reversal correlation with each other and practically equal to each other.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 20, 2003
    Inventors: Masaru Matsui, Sachio Nagamitsu
  • Publication number: 20030112139
    Abstract: A conventional human body sensing system using a tremor sensing-type human body sensor within a house has a problem such that the system cost becomes high because two human body sensors in each room or one human body sensor in each room plus one human body sensor in a corridor are used in order to sense a stationary person in a room so as to carry out a room exit determination.
    Type: Application
    Filed: October 1, 2002
    Publication date: June 19, 2003
    Inventors: Masaru Matsui, Shigeaki Matsubayashi, Sachio Nagamitsu
  • Publication number: 20030001171
    Abstract: The present invention enables to design a semiconductor integrated circuit with a small chip area and the number of wiring layers at a low cost for a short time. In the present design method of the semiconductor integrated circuit, a first wiring group (a horizontal power wiring and horizontal ground wirings) and a second wiring group (a horizontal power wiring and horizontal ground wirings), which are opposite to each other, are arranged at the outside of a macro outer frame, a third wiring group (a vertical power wiring and a vertical ground wring) is arranged to correspond to a power terminal and a ground terminal on a macro cell, and these first and second wiring groups are connected to the power terminal and the ground terminal by the third wiring group.
    Type: Application
    Filed: June 28, 2002
    Publication date: January 2, 2003
    Applicant: NEC Corporation
    Inventors: Akihiro Banno, Shinichirou Ooshige, Masaru Shintani, Masaru Matsui
  • Patent number: 6460062
    Abstract: To simplify the structure of a discrete cosine transformation circuit for use in an audio recording/reproducing device. A selector can desirably supply a value “0” to an input terminal B of the adder/subtracter (80), so that an input to the adder/subtracter (80) via an input terminal A can be passed intact therethrough to be fed back thereto via the input terminal B. With this arrangement, direct connection between a multiplier to the input terminal B is unnecessary, and a selector which conventionally selects the direct connection and a loop back is also unnecessary. Further, since a selector (72) relating to proportional coefficients can desirably supply a value “1” to the multiplier (66), operand data inputted to the multiplier (66) can be supplied intact to the subsequent adder/subtracter (80) through the multiplier (66).
    Type: Grant
    Filed: January 28, 1999
    Date of Patent: October 1, 2002
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Masaru Matsui
  • Patent number: 6434686
    Abstract: A write address counter counts a write clock WCK and determines output as a write address, while read address counter counts a read clock RCK and determines output as a read address. The position of LSB in both the counters is shifted by the same number of bits at predetermined intervals, and the position of LSB of the read address counter before shifting is corresponded with the shifted position of the write address counter after shifting. Both the counters count and determine their outputs as write and read addresses. Thus, memory capacity can be reduced, and data can be written and read with different write and read orders.
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: August 13, 2002
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masaru Matsui, Masato Fuma
  • Publication number: 20020030478
    Abstract: A power consumption system has
    Type: Application
    Filed: July 25, 2001
    Publication date: March 14, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Sachio Nagamitsu, Shigeaki Matsubayashi, Masaru Matsui, Hisashi Kodama, Mitsuharu Kawase, Nobuhiro Ohishi
  • Patent number: 6308194
    Abstract: There is disclosed a discrete cosine transform circuit for use in a voice recording/reproducing device to solve problems that RAM in which data is stored is frequently accessed and that the power consumption is large. In discrete cosine transform, an algorithm can be constituted to include four or less items of operand data in one operation equation. Correspondingly, four registers 62-1 to 62-4 are arranged on the output side of RAM 60. The discrete cosine transform includes a predetermined regularity. For example, a plurality of operation equations using the same operand data are included in the processing. By continuously processing all of the operation equations, the data read into the registers 62-1 to 62-4 can be reused without being overwritten in another processing, so that accesses to RAM 60 can be suppressed.
    Type: Grant
    Filed: January 28, 1999
    Date of Patent: October 23, 2001
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masaru Matsui, Masato Fuma
  • Patent number: 6292817
    Abstract: To achieve bi-directional transformation by using a single simply-structured discrete cosine transformation circuit for use in an audio recording/reproducing device. There is provided a circuit which comprises a RAM 60, a ROM 68, a multiplier 66, and an adder/subtracter 80 and is capable of performing inverted transformation of a discrete cosine transformation. The multiplier 66 multiplies operand data stored in the RAM 60 by a proportional coefficient stored in the ROM 68. The adder/subtracter 80 add/subtracts outputs of the multiplier 66. This circuit is also able to perform a characteristic operation in a forward direction, such as addition or subtraction using intact base data. Specifically, data before conversion is stored in the RAM 61, and one of them is supplied to the adder/subtracter 80 via an input terminal A.
    Type: Grant
    Filed: January 28, 1999
    Date of Patent: September 18, 2001
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Masaru Matsui
  • Patent number: 6260122
    Abstract: Nine memories (10a˜10i) are provided, out of which five memories are made memories for the present processing. Meanwhile, the remaining four memories are made memories for receiving and storing data to be inputted during the processing. Then, the memories (10a˜10i) which have accepted input data to be inputted at each duration of 1 sound group (SG) are switched to be used for processing, and the memories (10a˜10i) which have been for processing are switched to be used for receiving input data, but a memory (10a˜10i) which has stored the latest data in the memories for processing is left for processing. With this arrangement, memory capacity can be reduced.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: July 10, 2001
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masaru Matsui, Fumiaki Nagao
  • Patent number: 5585044
    Abstract: The liquid treating method according to the present invention introduces a bubble into liquid phase and applies vibration waves, such as ultrasonic waves, from each sides of the bubble. Collision of the vibration waves with the bubble imparts the compression pressure to the bubble. This effect is used to dissolve a gas forming the bubble into the liquid phase or to improve liquid quality of this liquid phase.
    Type: Grant
    Filed: December 28, 1994
    Date of Patent: December 17, 1996
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Tomonori Kawakami, Masaru Matsui, Hiroe Sato, Mitsuo Hiramatsu, Shinichiro Aoshima