Patents by Inventor Masaru Nakamura

Masaru Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210327744
    Abstract: A wafer processing method includes a modified layer forming step, a protective member disposing step, a reinforcing portion forming step, and an undersurface processing step. The modified layer forming step forms, in a ring shape, a modified layer not reaching a finished thickness of a wafer by irradiating the wafer with a laser beam such that a condensing point of the laser beam is positioned in an inner part of the wafer, the inner part corresponding to a peripheral surplus region. The reinforcing portion forming step makes a cleavage plane reach the top surface from the modified layer formed in a ring shape, removes the modified layer, thins a region corresponding to a device region of the wafer to the finished thickness, and forms a ring-shaped reinforcing portion in a region corresponding to the peripheral surplus region of the wafer by grinding the undersurface of the wafer.
    Type: Application
    Filed: March 24, 2021
    Publication date: October 21, 2021
    Inventor: Masaru NAKAMURA
  • Publication number: 20210313747
    Abstract: A processing apparatus includes a chuck table that holds a workpiece, a processing unit that processes the workpiece held by the chuck table, and a panel that surrounds components including the chuck table and the processing unit. Power source sockets are disposed on the panel, and electric apparatuses including an inspection device, a personal computer, a fan, and a cleaner are connected to the power source sockets and are used.
    Type: Application
    Filed: March 15, 2021
    Publication date: October 7, 2021
    Inventor: Masaru NAKAMURA
  • Publication number: 20210270749
    Abstract: A crack detection method includes a crack forming step of applying a laser beam to a plate-shaped workpiece that has a first side and a second side opposite to the first side linearly from the first side with a focal point of the laser beam positioned inside the workpiece, the laser beam being of a wavelength having a transmitting property to the workpiece, to thereby form a modified layer inside the workpiece and further form a crack extending from the modified layer toward the second side, a coating material applying step of applying a coating material to the second side, and a crack detecting step of detecting the crack by searching for a portion where the coating material is linearly repelled.
    Type: Application
    Filed: February 11, 2021
    Publication date: September 2, 2021
    Inventor: Masaru NAKAMURA
  • Publication number: 20210265209
    Abstract: Provided is a wafer processing method for dividing a wafer having devices formed on a front side thereof into individual device chips, the front side being partitioned by a plurality of crossing division lines having a testing metal pattern formed in part thereof into a plurality of regions where the respective devices are formed. The method includes a first modified layer forming step of applying a laser beam of a wavelength having a transmitting property to the wafer with a focal point of the laser beam positioned inside the wafer at a first depth from the back side, thereby forming a first modified layer along a division line, and a second modified layer forming step of applying the laser beam with the focal point positioned at a second depth shallower than the first depth, thereby forming a second modified layer along the same division line.
    Type: Application
    Filed: February 5, 2021
    Publication date: August 26, 2021
    Inventor: Masaru NAKAMURA
  • Publication number: 20210257256
    Abstract: There is provided a wafer processing method including a protective member disposing step of disposing a protective member on a top surface of a wafer; a modified layer forming step of forming an annular modified layer by irradiating the wafer with a laser beam so as to position, within a peripheral surplus region, a condensing point of the laser beam having a wavelength transmissible through the wafer; a separating step of separating a part or a whole of the peripheral surplus region from the wafer by dividing the wafer with the annular modified layer as a starting point; and a grinding step of thinning the wafer by grinding an undersurface of the wafer. In the modified layer forming step, the modified layer is formed in a shape of a circular truncated cone whose diameter is decreased from the top surface to the undersurface of the wafer.
    Type: Application
    Filed: February 1, 2021
    Publication date: August 19, 2021
    Inventor: Masaru NAKAMURA
  • Publication number: 20210239398
    Abstract: The disclosure is a heat treatment furnace which heats an element wire for a wire electrode to perform a heat diffusion treatment and includes: first, second and third rotary electrodes to which a voltage is applied; a motor that rotationally drives the rotary electrodes; and a control device. The first, second and third rotary electrodes are arranged in a manner that the element wire is laid in a V-shape or an I-shape in an order of the second rotary electrode, the first rotary electrode and the third rotary electrode from the upstream side in a travel direction of the element wire. The element wire is caused to travel, a voltage is applied to the first, second and third rotary electrodes, and a current flows through and heats the element wire which travels in a first heating section and a second heating section.
    Type: Application
    Filed: January 28, 2021
    Publication date: August 5, 2021
    Applicant: Sodick Co., Ltd.
    Inventors: Tetsuro Kawahara, Tomoaki Asaoka, Masaru Nakamura
  • Patent number: 11069543
    Abstract: A laminate processing method includes a modified layer removing step of positioning a cutting blade to the region of the wafer corresponding to each of the division lines and cutting while supplying cutting water into which a water-soluble resin is mixed from the wafer side of the laminate, thereby removing the modified layer formed inside the wafer, a dividing step of, after the modified layer removing step is carried out, expanding the expandable tape, and dividing the laminate into individual image sensor chips, and a cleaning step of supplying cleaning water from the back surface of the wafer with a state in which the expandable tape is expanded being maintained, thereby cleaning the laminate.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: July 20, 2021
    Assignee: DISCO CORPORATION
    Inventor: Masaru Nakamura
  • Patent number: 11056361
    Abstract: A laminate processing method includes a water-soluble resin filling step of filling a water-soluble resin in a division groove formed in a dividing step, a modified layer removing step of positioning a cutting blade in the division groove formed in a back surface of a wafer to cut the division groove in a state in which the water-soluble resin is solidified or half-solidified, thereby removing a modified layer, and a water-soluble resin removing step of supplying cleaning water from the back surface of the wafer with a state in which an expandable tape is expanded being maintained, thereby removing the water-soluble resin being filled in a cut groove and the division groove.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: July 6, 2021
    Assignee: DISCO CORPORATION
    Inventor: Masaru Nakamura
  • Patent number: 11031276
    Abstract: A wafer expanding method for expanding a wafer having a plurality of rectangular devices respectively formed in a plurality of separate regions defined by a plurality of division lines, thereby increasing spacing between any adjacent ones of the devices, each rectangular device having a pair of shorter sides and a pair of longer sides. The wafer expanding method includes a jig preparing step of preparing an annular jig having an elliptical opening, the elliptical opening having a shorter portion for restricting a width of the annular exposed portion in a first direction where the shorter sides of the devices extend to a first width and a longer portion for restricting the width of the annular exposed portion in a second direction where the longer sides of the devices extend to a second width larger than the first width.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: June 8, 2021
    Assignee: DISCO CORPORATION
    Inventors: Yoshihiro Kawaguchi, Masaru Nakamura
  • Publication number: 20210159080
    Abstract: A wafer processing method for processing a wafer of a two-layer structure having a second wafer laminated on a front surface of a first wafer includes a stepped part forming step of cutting from the second wafer side to a peripheral surplus region of the first wafer to a depth corresponding to a finished thickness of the first wafer, thereby removing a chamfered part formed at a peripheral end of the second wafer and forming an annular stepped part in the peripheral surplus region of the first wafer, and a second wafer griding step of, after the stepped part forming step is carried out, grinding an exposed surface of the second wafer to make the second wafer to have a predetermined thickness.
    Type: Application
    Filed: November 11, 2020
    Publication date: May 27, 2021
    Inventor: Masaru NAKAMURA
  • Patent number: 11018044
    Abstract: A wafer expanding method increases spacing between adjacent devices formed on a wafer. The method includes preparing an annular jig having a first restricting portion, a second restricting portion, and a curved restricting portion connecting the first restricting portion and the second restricting portion, mounting a ring frame supporting the wafer through an adhesive tape on a cylindrical frame fixing member, next mounting the annular jig on the ring frame, and next fixing the ring frame and the annular jig to the cylindrical frame fixing member, and operating a cylindrical pushing member having an outer circumference corresponding to an outer circumference of the wafer to push up an annular exposed portion of the adhesive tape defined between the wafer and the ring frame and thereby lift the wafer away from the ring frame, thereby expanding the annular exposed portion and increasing the spacing between the adjacent devices.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: May 25, 2021
    Assignee: DISCO CORPORATION
    Inventors: Masaru Nakamura, Saki Kozuma
  • Publication number: 20210125870
    Abstract: A wafer processing method includes a modified layer forming step of applying a laser beam of a wavelength having transmitting property to a wafer with a focusing point of the laser beam positioned inside the wafer at positions corresponding to division lines, thereby to form modified layers, and a back side grinding step of holding the wafer on a chuck table of a grinding apparatus, grinding a back side of the wafer to thin the wafer, and dividing the wafer into individual device chips from cracks that are generated from the modified layers formed inside the wafer along the division lines to the division lines formed on a front side of the wafer. In the modified layer forming step, in a case where triangular chips each having a surface area smaller than the device chips are to be formed, the application of the laser beam is stopped in a region where the triangular chips are to be formed.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 29, 2021
    Inventors: Masaru Nakamura, Hisayuki Yamaoka
  • Publication number: 20210031307
    Abstract: A laser processing apparatus includes an unloading/loading mechanism for unloading a wafer from and loading a wafer into a cassette placed on a cassette placing stand, a chuck table for rotatably holding the wafer unloaded from the cassette by the unloading/loading mechanism, an image capturing unit for capturing an image of a wafer, and a control unit. The control unit controls the unloading/loading mechanism to orient a mark indicating the crystal orientation of a processed wafer in a predetermined direction different from a direction in which the mark of an unprocessed wafer in the cassette is oriented, when the unloading/loading mechanism houses the processed wafer into the cassette.
    Type: Application
    Filed: July 23, 2020
    Publication date: February 4, 2021
    Inventor: Masaru NAKAMURA
  • Publication number: 20210035826
    Abstract: A control unit of a laser processing apparatus includes: a reference image storage section that images streets before formation of modified layers by an imaging unit and stores the captured image as a reference image; a calculation section that compares the reference image stored in the reference image storage section with an image of a wafer held by a chuck table that is captured by the imaging unit, and calculates the degree of agreement of the two images; and a decision section that decides whether the wafer is an unprocessed wafer not formed with the modified layers in the case where the degree of agreement calculated by the calculation section is more than a first predetermined value, and decides whether the wafer is a processed wafer formed with the modified layers in the case where the degree of agreement is equal to or less than a second predetermined value.
    Type: Application
    Filed: July 28, 2020
    Publication date: February 4, 2021
    Inventor: Masaru NAKAMURA
  • Patent number: 10797932
    Abstract: In order to quickly and reliably establish link up, when a communication device detects power on or link down, an idle signal generation circuit generates an idle signal. Then, an I/F circuit transmits the idle signal to a communication device which is a communication partner through a selection circuit. Further, the I/F circuit transmits and receives learning signals to and from the communication device which is a communication partner. A Step 1 learning circuit, a Step 2 learning circuit, and a Step 3 learning circuit establish link up by using the learning signals. When not receiving a signal from a link detection circuit indicating that link up is established, a reset mask circuit transmits a reset signal generated by a reset signal generation circuit, to the Step 1 learning circuit, the Step 2 learning circuit, and the Step 3 learning circuit to allow them to learn again.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: October 6, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Masaru Nakamura
  • Patent number: 10668153
    Abstract: A boron neutron capture therapy system has a neutron beam irradiation device, a patient restraint/placement portion, a three-dimensional diagnostic device, an irradiation table, a position adjustment mechanism, and a control unit. The boron neutron capture therapy system performs position determination with a sufficient degree of accuracy at the time of the boron neutron capture therapy. Further, the control unit, using the movement of the irradiation table, performs collision avoidance processing that changes the movement of the irradiation table before the patient restrained on the patient restraint/placement portion receives injury by colliding with the irradiation port, and thus, collision between the patient and the irradiation port can be avoided.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: June 2, 2020
    Assignees: Fujidenolo Co. Ltd., Cancer Intelligence Care Systems, Inc.
    Inventors: Tsuyako Takeyoshi, Masaru Nakamura, Yoshio Imahori, Hideki Miyazaki, Toshitaka Fujioka, Shinsuke Kato
  • Publication number: 20200161149
    Abstract: A laminate processing method includes a modified layer removing step of positioning a cutting blade to the region of the wafer corresponding to each of the division lines and cutting while supplying cutting water into which a water-soluble resin is mixed from the wafer side of the laminate, thereby removing the modified layer formed inside the wafer, a dividing step of, after the modified layer removing step is carried out, expanding the expandable tape, and dividing the laminate into individual image sensor chips, and a cleaning step of supplying cleaning water from the back surface of the wafer with a state in which the expandable tape is expanded being maintained, thereby cleaning the laminate.
    Type: Application
    Filed: November 12, 2019
    Publication date: May 21, 2020
    Inventor: Masaru NAKAMURA
  • Publication number: 20200161150
    Abstract: A laminate processing method includes a water-soluble resin filling step of filling a water-soluble resin in a division groove formed in a dividing step, a modified layer removing step of positioning a cutting blade in the division groove formed in a back surface of a wafer to cut the division groove in a state in which the water-soluble resin is solidified or half-solidified, thereby removing a modified layer, and a water-soluble resin removing step of supplying cleaning water from the back surface of the wafer with a state in which an expandable tape is expanded being maintained, thereby removing the water-soluble resin being filled in a cut groove and the division groove.
    Type: Application
    Filed: November 12, 2019
    Publication date: May 21, 2020
    Inventor: Masaru Nakamura
  • Publication number: 20200135532
    Abstract: A wafer expanding method increases spacing between adjacent devices formed on a wafer. The method includes preparing an annular jig having a first restricting portion, a second restricting portion, and a curved restricting portion connecting the first restricting portion and the second restricting portion, mounting a ring frame supporting the wafer through an adhesive tape on a cylindrical frame fixing member, next mounting the annular jig on the ring frame, and next fixing the ring frame and the annular jig to the cylindrical frame fixing member, and operating a cylindrical pushing member having an outer circumference corresponding to an outer circumference of the wafer to push up an annular exposed portion of the adhesive tape defined between the wafer and the ring frame and thereby lift the wafer away from the ring frame, thereby expanding the annular exposed portion and increasing the spacing between the adjacent devices.
    Type: Application
    Filed: October 25, 2019
    Publication date: April 30, 2020
    Inventors: Masaru NAKAMURA, Saki KOZUMA
  • Publication number: 20200135533
    Abstract: A wafer expanding method for expanding a wafer having a plurality of rectangular devices respectively formed in a plurality of separate regions defined by a plurality of division lines, thereby increasing spacing between any adjacent ones of the devices, each rectangular device having a pair of shorter sides and a pair of longer sides. The wafer expanding method includes a jig preparing step of preparing an annular jig having an elliptical opening, the elliptical opening having a shorter portion for restricting a width of the annular exposed portion in a first direction where the shorter sides of the devices extend to a first width and a longer portion for restricting the width of the annular exposed portion in a second direction where the longer sides of the devices extend to a second width larger than the first width.
    Type: Application
    Filed: October 29, 2019
    Publication date: April 30, 2020
    Inventors: Yoshihiro KAWAGUCHI, Masaru NAKAMURA