Patents by Inventor Masaru Nishino
Masaru Nishino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11694872Abstract: A method of processing a substrate includes loading the substrate on a substrate holder. The substrate includes a major surface and a feature disposed over the major surface. The feature has a first width along an etch direction. The method includes exposing portions of the major surface and changing the first width of the feature to a second width along the etch direction by etching a first portion of the sidewalls of the feature with a gas cluster ion beam oriented along a beam direction.Type: GrantFiled: May 17, 2022Date of Patent: July 4, 2023Assignee: TEL Manufacturing and Engineering of America, Inc.Inventors: Kazuya Dobashi, Hiromitsu Kambara, Masaru Nishino, Reo Kosaka, Matthew Gwinn, Luis Fernandez, Kenichi Oyama, Sakurako Natori, Noriaki Okabe
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Patent number: 11450506Abstract: A method of processing a substrate includes loading the substrate on a substrate holder. The substrate includes a major surface and a feature disposed over the major surface. The feature has a first width along an etch direction. The method includes exposing portions of the major surface and changing the first width of the feature to a second width along the etch direction by etching a first portion of the sidewalls of the feature with a gas cluster ion beam oriented along a beam direction.Type: GrantFiled: September 11, 2020Date of Patent: September 20, 2022Assignee: TEL MANUFACTURING AND ENGINEERING OF AMERICA, INC.Inventors: Kazuya Dobashi, Hiromitsu Kambara, Masaru Nishino, Reo Kosaka, Matthew Gwinn, Luis Fernandez, Kenichi Oyama, Sakurako Natori, Noriaki Okabe
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Publication number: 20220277924Abstract: A method of processing a substrate includes loading the substrate on a substrate holder. The substrate includes a major surface and a feature disposed over the major surface. The feature has a first width along an etch direction. The method includes exposing portions of the major surface and changing the first width of the feature to a second width along the etch direction by etching a first portion of the sidewalls of the feature with a gas cluster ion beam oriented along a beam direction.Type: ApplicationFiled: May 17, 2022Publication date: September 1, 2022Inventors: Kazuya Dobashi, Hiromitsu Kambara, Masaru Nishino, Reo Kosaka, Matthew Gwinn, Luis Fernandez, Kenichi Oyama, Sakurako Natori, Noriaki Okabe
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Publication number: 20210335568Abstract: A method of processing a substrate includes loading the substrate on a substrate holder. The substrate includes a major surface and a feature disposed over the major surface. The feature has a first width along an etch direction. The method includes exposing portions of the major surface and changing the first width of the feature to a second width along the etch direction by etching a first portion of the sidewalls of the feature with a gas cluster ion beam oriented along a beam direction.Type: ApplicationFiled: September 11, 2020Publication date: October 28, 2021Inventors: Kazuya Dobashi, Hiromitsu Kambara, Masaru Nishino, Reo Kosaka, Matthew Gwinn, Luis Fernandez, Kenichi Oyama, Sakurako Natori, Noriaki Okabe
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Publication number: 20170221684Abstract: A plasma processing method includes removing a deposit, which adheres to a member within a processing vessel and includes at least one of a transition metal and a base metal, by plasma of a processing gas, wherein the processing gas includes Ar gas and a CHzFw gas, and does not includes a chlorine-based gas and a nitrogen-based gas. The deposit is removed by the plasma of the processing gas while applying a negative DC voltage to the member within the processing vessel, and the negative DC voltage is set to be equal to or less than ?100V such that argon ions in the plasma of the processing gas collide with the member within the processing vessel and the deposit is removed by sputtering of the argon ions.Type: ApplicationFiled: April 11, 2017Publication date: August 3, 2017Inventors: Masaru NISHINO, Takao FUNAKUBO, Shinichi KOZUKA, Ryosuke NIITSUMA, Tsutomu ITO
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Patent number: 9653317Abstract: A metal-containing deposit can be efficiently removed. A plasma processing method includes removing a deposit, which adheres to a member within a processing vessel and contains at least one of a transition metal and a base metal, by plasma of a processing gas containing a CxFy gas, in which x is an integer equal to or less than 2 and y is an integer equal to or less than 6, and without containing a chlorine-based gas and a nitrogen-based gas.Type: GrantFiled: October 23, 2014Date of Patent: May 16, 2017Assignee: TOKYO ELECTRON LIMITEDInventors: Masaru Nishino, Takao Funakubo, Shinichi Kozuka, Ryosuke Niitsuma, Tsutomu Ito
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Patent number: 9305817Abstract: A method for purging a substrate container which accommodates in multiple stages a plurality of substrates to be processed by a substrate processing apparatus, the method includes: mounting the substrate container on a mounting unit; connecting a gas supply port provided in the substrate container and a gas supply line provided in a mounting unit; starting supply of a dry gas into the substrate container from a gas supply line before opening a cover of the substrate container; opening the cover of the substrate container while keeping the supply of the dry gas; closing the cover of the substrate container upon completion of processing of the substrates in the substrate container; and stopping the supply of the dry gas after closing the cover of the substrate container.Type: GrantFiled: February 4, 2013Date of Patent: April 5, 2016Assignee: TOKYO ELECTRON LIMITEDInventors: Seiichi Kaise, Shigeki Amemiya, Shinobu Onodera, Hiroki Fujita, Masaru Nishino, Atsushi Rikukawa
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Publication number: 20150118859Abstract: A metal-containing deposit can be efficiently removed. A plasma processing method includes removing a deposit, which adheres to a member within a processing vessel and contains at least one of a transition metal and a base metal, by plasma of a processing gas containing a CxFy gas, in which x is an integer equal to or less than 2 and y is an integer equal to or less than 6, and without containing a chlorine-based gas and a nitrogen-based gas.Type: ApplicationFiled: October 23, 2014Publication date: April 30, 2015Inventors: Masaru NISHINO, Takao FUNAKUBO, Shinichi KOZUKA, Ryosuke NIITSUMA, Tsutomu ITO
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Patent number: 8986493Abstract: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.Type: GrantFiled: December 18, 2012Date of Patent: March 24, 2015Assignee: Tokyo Electron LimitedInventors: Shigeru Tahara, Masaru Nishino
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Patent number: 8896210Abstract: A plasma processing apparatus includes a processing chamber; a lower electrode serving as a mounting table for mounting thereon a target object; and an upper electrode or an antenna electrode provided to be opposite to the lower electrode. The apparatus further includes a gas supply source for introducing a gas including a halogen-containing gas and an oxygen gas into the processing chamber and a high frequency power supply for applying a high frequency power for generating plasma to at least one of the upper electrode, the antenna electrode, or the lower electrode. Among inner surfaces of the processing chamber which are exposed to the plasma, at least a part of or all of the surfaces between a mounting position of the target object and the upper electrode, or the antenna electrode; or at least a part of or all of the surfaces of the upper electrode or the antenna electrode are coated with a fluorinated compound.Type: GrantFiled: December 5, 2012Date of Patent: November 25, 2014Assignees: Tokyo Electron Limited, Tocalo Co., Ltd.Inventors: Masaru Nishino, Masatsugu Makabe, Nobuyuki Nagayama, Tatsuya Handa, Ryotaro Midorikawa, Keigo Kobayashi, Tetsuya Niya
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Patent number: 8790489Abstract: The substrate processing apparatus includes a process chamber which accommodates a wafer and performs a plasma etching process on the wafer, an exhaust chamber which communicates with the process chamber, an exhaust plate which divides the process chamber from the exhaust chamber and prevents plasma inside the process chamber from leaking into the exhaust chamber, and an upper electrode plate arranged inside the exhaust chamber, wherein the exhaust plate includes a plurality of through holes, and the upper electrode plate includes a plurality of through holes, is capable of contacting the exhaust plate in parallel, and is capable of being spaced apart from the exhaust plate.Type: GrantFiled: July 1, 2011Date of Patent: July 29, 2014Assignee: Tokyo Electron LimitedInventors: Masanobu Honda, Kazuhiro Kubota, Yoshinobu Ooya, Masaru Nishino
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Patent number: 8361275Abstract: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.Type: GrantFiled: March 8, 2012Date of Patent: January 29, 2013Assignee: Tokyo Electron LimitedInventors: Shigeru Tahara, Masaru Nishino
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Patent number: 8252192Abstract: A method of pattern etching a thin film on a substrate is described. The method comprises preparing a film stack on a substrate, wherein the film stack comprises a dielectric layer formed on the substrate and a mask layer formed above the dielectric layer. A pattern is created in the mask layer, and the pattern is transferred from the mask layer to the dielectric layer by performing a plasma etching process. While transferring the pattern to the dielectric layer, the mask layer is substantially removed using the plasma etching process. The plasma etching process can use a process gas comprising a first gaseous component that etches the dielectric layer at a greater rate than the mask layer, and a second gaseous component that etches the dielectric layer at a lesser rate than the mask layer.Type: GrantFiled: March 26, 2009Date of Patent: August 28, 2012Assignee: Tokyo Electron LimitedInventors: Yao-Sheng Lee, Vaidyanathan Balasubramaniam, Masaru Nishino, Kelvin Zin
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Publication number: 20120160416Abstract: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.Type: ApplicationFiled: March 8, 2012Publication date: June 28, 2012Applicant: TOKYO ELECTRON LIMITEDInventors: Shigeru Tahara, Masaru Nishino
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Patent number: 8190023Abstract: An input of a command to stop optical output or a command to reduce optical output by a main signal transmitting section is received from the outside. When the input of the optical output stop command or optical output reduction command is received, an inter-device control signal communication section transmits the optical output stop command or optical output reduction command. Based on the input optical output stop command or optical output reduction command, an output of optical signals from the main signal transmitting section is stopped, or else the output level is reduced to less than the output level during normal operation.Type: GrantFiled: July 29, 2009Date of Patent: May 29, 2012Assignee: NEC CorporationInventor: Masaru Nishino
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Publication number: 20120000886Abstract: The substrate processing apparatus includes a process chamber which accommodates a wafer and performs a plasma etching process on the wafer, an exhaust chamber which communicates with the process chamber, an exhaust plate which divides the process chamber from the exhaust chamber and prevents plasma inside the process chamber from leaking into the exhaust chamber, and an upper electrode plate arranged inside the exhaust chamber, wherein the exhaust plate includes a plurality of through holes, and the upper electrode plate includes a plurality of through holes, is capable of contacting the exhaust plate in parallel, and is capable of being spaced apart from the exhaust plate.Type: ApplicationFiled: July 1, 2011Publication date: January 5, 2012Applicant: TOKYO ELECTRON LIMITEDInventors: Masanobu HONDA, Kazuhiro KUBOTA, Yoshinobu OOYA, Masaru NISHINO
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Patent number: 7998872Abstract: A method of dry developing a multi-layer mask having a silicon-containing anti-reflective coating (ARC) layer on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying the silicon-containing ARC layer. A feature pattern is then formed in the lithographic layer using a lithographic process, wherein the feature pattern comprises a first critical dimension (CD). Thereafter, the feature pattern is transferred from the lithographic layer to the silicon-containing ARC layer using a dry plasma etching process, wherein the first CD in the lithographic layer is reduced to a second CD in the silicon-containing layer and a first edge roughness is reduced to a second edge roughness in the silicon-containing ARC layer.Type: GrantFiled: February 6, 2008Date of Patent: August 16, 2011Assignee: Tokyo Electron LimitedInventors: Vinh Hoang Luong, Masaru Nishino, Vaidyanathan Balasubramaniam
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Publication number: 20100243604Abstract: A method of pattern etching a thin film on a substrate is described. The method comprises preparing a film stack on a substrate, wherein the film stack comprises a dielectric layer formed on the substrate and a mask layer formed above the dielectric layer. A pattern is created in the mask layer, and the pattern is transferred from the mask layer to the dielectric layer by performing a plasma etching process. While transferring the pattern to the dielectric layer, the mask layer is substantially removed using the plasma etching process. The plasma etching process can use a process gas comprising a first gaseous component that etches the dielectric layer at a greater rate than the mask layer, and a second gaseous component that etches the dielectric layer at a lesser rate than the mask layer.Type: ApplicationFiled: March 26, 2009Publication date: September 30, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Yao-Sheng LEE, Vaidyanathan BALASUBRAMANIAM, Masaru NISHINO, Kelvin ZIN
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Publication number: 20100216310Abstract: A method of dry developing an anti-reflective coating (ARC) layer on a substrate is described. The method comprises disposing a substrate comprising a multi-layer mask in a plasma processing system, wherein the multi-layer mask comprises a lithographic layer overlying a silicon-containing ARC layer and wherein the lithographic layer comprises a feature pattern formed therein using a lithographic process. The method further comprises: introducing a process gas to the plasma processing system according to a process recipe, the process gas comprising a nitrogen-containing gas, a hydrogen-containing gas, and a CxHyFz-containing gas, wherein x, y, and z are integers greater than or equal to unity; forming plasma from the process gas in the plasma processing system according to the process recipe; and exposing the substrate to the plasma in order to transfer the feature pattern in the lithographic layer to the underlying silicon-containing ARC layer.Type: ApplicationFiled: February 20, 2009Publication date: August 26, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Andrew W. METZ, Shuhei OGAWA, Vaidyanathan BALASUBRAMANIAM, Masaru NISHINO
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Publication number: 20100116787Abstract: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.Type: ApplicationFiled: January 20, 2010Publication date: May 13, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Shigeru Tahara, Masaru Nishino