Patents by Inventor Masaru Osani

Masaru Osani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4723082
    Abstract: A laminated multilayer electric circuit is comprised of wafers having each internal electric circuits and laminated one after another. A signal transfer circuit used in the laminated multilayer electric circuit for transfer of signals between the wafers through an electrostatic capacitor has a receiving circuit of sufficiently high input resistance for receiving a signal from a capacitance electrode forming the electrostatic capacitor, and a circuit for clamping the level of the signal substantially within the input amplitude for the receiving circuit. The signal transfer circuit permits the signal transfer to be performed not through a flip-flop or the like and consequently at high speeds.
    Type: Grant
    Filed: July 14, 1986
    Date of Patent: February 2, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Michio Asano, Akira Masaki, Masaru Osani, Minoru Yamada, Kenichi Ishibashi, Noboru Masuda