Patents by Inventor Masaru Shinomiya
Masaru Shinomiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240297224Abstract: A nitride semiconductor substrate, including a Ga-containing nitride semiconductor thin film formed on a substrate for film-forming in which a single crystal silicon layer is formed on a composite substrate in which a plurality of layers is bonded, wherein the nitride semiconductor substrate has a region where the Ga-containing nitride semiconductor thin film is not formed inward from an edge of the single crystal silicon layer being a growth surface of the nitride semiconductor thin film. This provides: a nitride semiconductor substrate with inhibited generation of a reaction mark; and a manufacturing method therefor.Type: ApplicationFiled: January 17, 2022Publication date: September 5, 2024Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ippei KUBONO, Kazunori HAGIMOTO, Masaru SHINOMIYA
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Publication number: 20240079412Abstract: A nitride semiconductor substrate, including a Ga-containing nitride semiconductor thin film formed on a substrate for film-forming in which a single crystal silicon layer is formed above a supporting substrate via an insulative layer, wherein the nitride semiconductor substrate has a region where the Ga-containing nitride semiconductor thin film is not formed inward from an edge of the single crystal silicon layer being a growth surface of the nitride semiconductor thin film. This provides: a nitride semiconductor substrate with inhibited generation of a reaction mark; and a manufacturing method therefor.Type: ApplicationFiled: January 17, 2022Publication date: March 7, 2024Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ippei KUBONO, Keitaro TSUCHIYA, Kazunori HAGIMOTO, Masaru SHINOMIYA
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Publication number: 20230290835Abstract: The present invention is a nitride semiconductor wafer, including: a silicon single-crystal substrate; and a device layer composed of a nitride semiconductor above the silicon single-crystal substrate, wherein the silicon single-crystal substrate is a CZ silicon single-crystal substrate, and has a resistivity of 1000 ?·cm or more, an oxygen concentration of 5.0×1016 atoms/cm3 (JEIDA) or more and 2.0×1.017 atoms/cm3 (JEIDA) or less, and a nitrogen concentration of 5.0×1014 atoms/cm3 or more. This provides a nitride semiconductor wafer that hardly causes plastic deformation even using a high-resistant low-oxygen silicon single-crystal substrate produced by the CZ method, which is suitably used for a high-frequency device, and that can reduce warpage of the substrate.Type: ApplicationFiled: July 12, 2021Publication date: September 14, 2023Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Keitaro TSUCHIYA, Masaru SHINOMIYA, Kosei SUGAWARA
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Publication number: 20230279581Abstract: A method for producing a nitride semiconductor wafer, in which a nitride semiconductor thin film is grown on a silicon single crystal substrate by vapor phase growth, includes, by using a silicon single crystal substrate having a resistivity of 1000 ?·cm or more, an oxygen concentration of less than 1×1017 atoms/cm3 and a thickness of 1000 ?m or more, growing the nitride semiconductor thin film on the silicon single crystal substrate by vapor phase growth. As a result, a method produces a nitride semiconductor wafer in which plastic deformation and warpage are suppressed even in the case of a high-resistivity, ultra-low oxygen concentration silicon single crystal substrate, which is promising as a support substrate for high frequency devices.Type: ApplicationFiled: April 8, 2021Publication date: September 7, 2023Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Keitaro TSUCHIYA, Masaru SHINOMIYA, Kazunori HAGIMOTO, Ippei KUBONO
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Publication number: 20230235481Abstract: A silicon single crystal substrate for vapor phase growth, having the silicon single crystal substrate being made of an FZ crystal having a resistivity of 1000 ?cm or more, wherein the surface of the silicon single crystal substrate is provided with a high nitrogen concentration layer having a nitrogen concentration higher than that of other regions and a nitrogen concentration of 5×1015 atoms/cm3 or more and a thickness of 10 to 100 ?m.Type: ApplicationFiled: March 23, 2021Publication date: July 27, 2023Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Keitaro TSUCHIYA, Masaru SHINOMIYA, Weifeng QU
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Publication number: 20210358738Abstract: A method for manufacturing an epitaxial wafer including the steps of: preparing a silicon-based substrate having a chamfered portion in a peripheral portion; forming an annular trench in the chamfered portion of the silicon-based substrate along an internal periphery of the chamfered portion; and performing an epitaxial growth on the silicon-based substrate having the trench formed. This provides a method for manufacturing an epitaxial wafer by which a crack generated in a peripheral chamfered portion can be suppressed from extending towards the center.Type: ApplicationFiled: September 6, 2019Publication date: November 18, 2021Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Keitarou TSUCHIYA, Kazunori HAGIMOTO, Masaru SHINOMIYA
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Patent number: 10833184Abstract: A semiconductor device substrate including: a substrate; a buffer layer which is provided on the substrate and made of a nitride semiconductor; and a device active layer which is formed of a nitride semiconductor layer provided on the buffer layer, the semiconductor device substrate in that the buffer layer includes: a first region which contains carbon and iron; a second region which is provided on the first region and has average concentration of iron lower than that in the first region and average concentration of carbon higher than that in the first region, and the average concentration of the carbon in the second region is lower than the average concentration of the iron in the first region. The semiconductor device substrate which can suppress a transverse leak current in a high-temperature operation of a device while suppressing a longitudinal leak current and can inhibit a current collapse phenomenon is provided.Type: GrantFiled: February 24, 2017Date of Patent: November 10, 2020Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ken Sato, Hiroshi Shikauchi, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
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Patent number: 10586701Abstract: Semiconductor base including: silicon-based substrate; buffer layer including first and second layers alternately on silicon-based substrate, first layer made of nitride-based compound semiconductor containing first material, second layer made of nitride-based compound semiconductor containing second material having larger lattice constant than first material; channel layer on buffer layer and made of nitride-based compound semiconductor containing second material, buffer layer has: first composition graded layer between at least one of first layers and second layer immediately thereabove, made of nitride-based compound semiconductor whose composition ratio of second material is increased gradually upward, whose composition ratio of first material is decreased gradually upward; second composition graded layer between at least one of second layers and first layer immediately thereabove, made of nitride-based compound semiconductor whose first material is increased gradually upward, whose composition ratio of sType: GrantFiled: February 26, 2016Date of Patent: March 10, 2020Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Hiroshi Shikauchi, Ken Sato, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
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Patent number: 10553674Abstract: A substrate for semiconductor device includes a substrate, a buffer layer which is provided on the substrate and made of a nitride semiconductor, and a device active layer which is provided on the buffer layer and composed of a nitride semiconductor layer, wherein the buffer layer contains carbon and iron, a carbon concentration of an upper surface of the buffer layer is higher than a carbon concentration of a lower surface of the buffer layer, and an iron concentration of the upper surface of the buffer layer is lower than an iron concentration of the lower surface of the buffer layer. As a result, the substrate for semiconductor device can reduce a leak current in a lateral direction at the time of a high-temperature operation while suppressing a leak current in a longitudinal direction.Type: GrantFiled: June 17, 2016Date of Patent: February 4, 2020Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ken Sato, Hiroshi Shikauchi, Hirokazu Goto, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
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Patent number: 10529842Abstract: A semiconductor base substance includes: a substrate; a buffer layer which is made of a nitride semiconductor and provided on the substrate; and a channel layer which is made of a nitride semiconductor and provided on the buffer layer, wherein the buffer layer includes: a first region which is provided on the substrate side and has boron concentration higher than acceptor element concentration; and a second region which is provided on the first region, and has boron concentration lower than that in the first region and acceptor element concentration higher than that in the first region. As a result, the semiconductor base substance which can obtain a high pit suppression effect while maintaining a high longitudinal breakdown voltage is provided.Type: GrantFiled: August 29, 2016Date of Patent: January 7, 2020Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Hiroshi Shikauchi, Ken Sato, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
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Publication number: 20190214492Abstract: A semiconductor device substrate including: a substrate; a buffer layer which is provided on the substrate and made of a nitride semiconductor; and a device active layer which is formed of a nitride semiconductor layer provided on the buffer layer, the semiconductor device substrate in that the buffer layer includes: a first region which contains carbon and iron; a second region which is provided on the first region and has average concentration of iron lower than that in the first region and average concentration of carbon higher than that in the first region, and the average concentration of the carbon in the second region is lower than the average concentration of the iron in the first region. The semiconductor device substrate which can suppress a transverse leak current in a high-temperature operation of a device while suppressing a longitudinal leak current and can inhibit a current collapse phenomenon is provided.Type: ApplicationFiled: February 24, 2017Publication date: July 11, 2019Applicants: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ken SATO, Hiroshi SHIKAUCHI, Masaru SHINOMIYA, Keitaro TSUCHIYA, Kazunori HAGIMOTO
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Patent number: 10319587Abstract: A method of manufacturing an epitaxial wafer having an epitaxial layer on a silicon-based substrate, the method of manufacturing the epitaxial wafer including epitaxially growing a semiconductor layer on the silicon-based substrate after applying terrace processing to an outer peripheral portion of the silicon-based substrate. As a result, the method of manufacturing the epitaxial wafer having the epitaxial layer on the silicon-based substrate in which an epitaxial wafer which is completely free from cracks can be obtained, is provided.Type: GrantFiled: February 10, 2015Date of Patent: June 11, 2019Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori Hagimoto, Masaru Shinomiya, Keitaro Tsuchiya, Hirokazu Goto, Ken Sato, Hiroshi Shikauchi, Shoichi Kobayashi, Hirotaka Kurimoto
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Publication number: 20190051515Abstract: Semiconductor base including: silicon-based substrate; buffer layer including first and second layers alternately on silicon-based substrate, first layer made of nitride-based compound semiconductor containing first material, second layer made of nitride-based compound semiconductor containing second material having larger lattice constant than first material; channel layer on buffer layer and made of nitride-based compound semiconductor containing second material, buffer layer has: first composition graded layer between at least one of first layers and second layer immediately thereabove, made of nitride-based compound semiconductor whose composition ratio of second material is increased gradually upward, whose composition ratio of first material is decreased gradually upward; second composition graded layer between at least one of second layers and first layer immediately thereabove, made of nitride-based compound semiconductor whose first material is increased gradually upward, whose composition ratio of sType: ApplicationFiled: February 26, 2016Publication date: February 14, 2019Applicants: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Hiroshi SHIKAUCHI, Ken SATO, Masaru SHINOMIYA, Keitaro TSUCHIYA, Kazunori HAGIMOTO
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Patent number: 10115589Abstract: An epitaxial substrate for electronic devices, including: a Si-based substrate; an AlN initial layer provided on the Si-based substrate; and a buffer layer provided on the AlN initial layer, wherein the roughness Sa of the surface of the AlN initial layer on the side where the buffer layer is located is 4 nm or more. As a result, an epitaxial substrate for electronic devices, in which V pits in a buffer layer structure can be suppressed and longitudinal leakage current characteristics can be improved when an electronic device is fabricated therewith, is provided.Type: GrantFiled: December 18, 2015Date of Patent: October 30, 2018Assignees: SHIN-ETSU HANDOTAI CO., LTD., SANKEN ELECTRIC CO., LTD.Inventors: Kazunori Hagimoto, Masaru Shinomiya, Keitaro Tsuchiya, Hirokazu Goto, Ken Sato, Hiroshi Shikauchi
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Publication number: 20180269316Abstract: A semiconductor base substance includes: a substrate; a buffer layer which is made of a nitride semiconductor and provided on the substrate; and a channel layer which is made of a nitride semiconductor and provided on the buffer layer, wherein the buffer layer includes: a first region which is provided on the substrate side and has boron concentration higher than acceptor element concentration; and a second region which is provided on the first region, and has boron concentration lower than that in the first region and acceptor element concentration higher than that in the first region. As a result, the semiconductor base substance which can obtain a high pit suppression effect while maintaining a high longitudinal breakdown voltage is provided.Type: ApplicationFiled: August 29, 2016Publication date: September 20, 2018Applicants: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Hiroshi SHIKAUCHI, Ken SATO, Masaru SHINOMIYA, Keitaro TSUCHIYA, Kazunori HAGIMOTO
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Patent number: 10068985Abstract: A method for manufacturing a semiconductor substrate, the semiconductor substrate including: a substrate; an initial layer provided on the substrate; a high-resistance layer provided on the initial layer which is composed of a nitride-based semiconductor and contains carbon; and a channel layer provided on the high-resistance layer which is composed of a nitride-based semiconductor, and at a step of forming the high-resistance layer, a gradient is given to a preset temperature at which the semiconductor substrate is heated, and the high-resistance layer is formed such that the preset temperature at the start of formation of the high-resistance layer is different from the preset temperature at the end of formation of the high-resistance layer. It is possible to provide the method for manufacturing a semiconductor substrate, which can reduce a concentration gradient of carbon concentration in the high-resistance layer and also provide a desired value for the carbon concentration.Type: GrantFiled: March 5, 2015Date of Patent: September 4, 2018Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ken Sato, Hiroshi Shikauchi, Hirokazu Goto, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
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Publication number: 20180245240Abstract: A method for producing a semiconductor epitaxial wafer, including steps of: fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate; observing the outer edge portion of the fabricated epitaxial wafer; and removing portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present. As a result, a method for producing a semiconductor epitaxial wafer in which a completely crack-free semiconductor epitaxial wafer can be obtained, is provided.Type: ApplicationFiled: February 22, 2018Publication date: August 30, 2018Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori HAGIMOTO, Masaru SHINOMIYA, Keitaro TSUCHIYA, Hirokazu GOTO, Ken SATO, Hiroshi SHIKAUCHI, Shoichi KOBAYASHI, Hirotaka KURIMOTO
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Publication number: 20180204908Abstract: A substrate for semiconductor device includes a substrate, a buffer layer which is provided on the substrate and made of a nitride semiconductor, and a device active layer which is provided on the buffer layer and composed of a nitride semiconductor layer, wherein the buffer layer contains carbon and iron, a carbon concentration of an upper surface of the buffer layer is higher than a carbon concentration of a lower surface of the buffer layer, and an iron concentration of the upper surface of the buffer layer is lower than an iron concentration of the lower surface of the buffer layer. As a result, the substrate for semiconductor device can reduce a leak current in a lateral direction at the time of a high-temperature operation while suppressing a leak current in a longitudinal direction.Type: ApplicationFiled: June 17, 2016Publication date: July 19, 2018Applicants: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Ken SATO, Hiroshi SHIKAUCHI, Hirokazu GOTO, Masaru SHINOMIYA, Keitaro TSUCHIYA, Kazunori HAGIMOTO
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Patent number: 9966259Abstract: A silicon-based substrate on which a nitride compound semiconductor layer is formed on a front surface thereof, including a first portion provided on the front surface side which has a first impurity concentration and a second portion provided on an inner side of the first portion which has a second impurity concentration higher than the first impurity concentration, wherein the first impurity concentration being 1×1014 atoms/cm3 or more and less than 1×1019 atoms/cm3. Consequently, there is provided the silicon-based substrate in which the crystallinity of the nitride compound semiconductor layer formed on an upper side thereof can be maintained excellently while improving a warpage of the substrate.Type: GrantFiled: May 3, 2017Date of Patent: May 8, 2018Assignees: SHANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.Inventors: Hiroshi Shikauchi, Ken Sato, Hirokazu Goto, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
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Patent number: 9938638Abstract: A method for producing a semiconductor epitaxial wafer, including steps of: fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate; observing the outer edge portion of the fabricated epitaxial wafer; and removing portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present. As a result, a method for producing a semiconductor epitaxial wafer in which a completely crack-free semiconductor epitaxial wafer can be obtained, is provided.Type: GrantFiled: February 10, 2015Date of Patent: April 10, 2018Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Kazunori Hagimoto, Masaru Shinomiya, Keitaro Tsuchiya, Hirokazu Goto, Ken Sato, Hiroshi Shikauchi, Shoichi Kobayashi, Hirotaka Kurimoto