Abstract: A light emitting device includes: a substrate; one or more LED (light emitting diode) elements mounted on a substrate; and a radiator unit made of metal paste and arranged on a rear surface opposite to a principal surface on which the one or more LED elements are mounted. The height Ta of the radiator unit from a rear surface is less than thickness Tb of substrate.

Abstract: A light emitting device includes: a substrate; one or more LED (light emitting diode) elements mounted on a substrate; and a radiator unit made of metal paste and arranged on a rear surface opposite to a principal surface on which the one or more LED elements are mounted. The height Ta of the radiator unit from a rear surface is less than thickness Tb of substrate.

Abstract: A light-emitting device includes a substrate, first LEDs and second LEDs mounted on the substrate, multiple wirings separately formed on the substrate, and a conductive member for connecting adjacent two wirings in multiple wirings for establishing series connection, parallel connection, or a combination of series and parallel connections of the first LEDs and the second LEDs. This achieves the light-emitting device that can support multiple different specifications, using a single type of substrate.

Abstract: A light-emitting device includes a substrate, first LEDs and second LEDs mounted on the substrate, multiple wirings separately formed on the substrate, and a conductive member for connecting adjacent two wirings in multiple wirings for establishing series connection, parallel connection, or a combination of series and parallel connections of the first LEDs and the second LEDs. This achieves the light-emitting device that can support multiple different specifications, using a single type of substrate.

Abstract: The present invention includes: a semiconductor element 1 including a circuit forming portion 11 formed on a central region of a principal surface of the semiconductor element 1 and a plurality of electrode pads 8 arranged on the principal surface outside the circuit forming portion 11; an interposer 3 on which the semiconductor element 1 is mounted, terminals 9 arranged on the interposer 3, thin metal wires for electrically connecting the electrode pads 8 and the terminals 9; and a sealing insulator for sealing the semiconductor element 1 and the thin metal wires 5. The present invention further includes a protective sheet 2 formed on the principal surface of the semiconductor element 1 so as to cover the circuit forming portion 11 and at least some of the plurality of electrodes pads 8.

Abstract: In a semiconductor package, a semiconductor chip is adhered with an adhesive member, with a circuit face of the semiconductor chip facing upward, onto a circuit board including a plurality of interconnections, a plurality of through holes, wire bonding pads and a solder resist for protecting the interconnections and the through holes. A plurality of electrodes of the semiconductor chip are electrically connected to the plural wire bonding pads of the circuit board through wires. A concave is formed in the solder resist of the circuit board correspondingly to every through hole of the circuit board, and concaves present in a region opposing a rim portion of the semiconductor chip and a region surrounding the semiconductor chip are buried with a resin so as to attain a flat top face.

Abstract: A semiconductor device of the invention includes a semiconductor element (1), an interposer (5) having electrodes (2) arranged on a top face thereof in four directions and external electrodes (4) arranged on a bottom face thereof with the semiconductor element (1) mounted on the top face thereof, an adhesive material (6) fixing the semiconductor element (1) to the interposer (5), metal nanowires (7) electrically connecting between electrodes of the semiconductor element (1) and the electrodes (2) of the interposer (5), an insulating material (8) sealing a region containing the semiconductor element (1) and the metal nanowires (7), and metal balls (9) mounted on the external electrodes (4). Patterns (10) are designed on corners of a region surrounded by electrodes (2) arranged on the interposer (5) in four directions.

Abstract: A semiconductor device of the invention includes a semiconductor element (1), an interposer (5) having electrodes (2) arranged on a top face thereof in four directions and external electrodes (4) arranged on a bottom face thereof with the semiconductor element (1) mounted on the top face thereof, an adhesive material (6) fixing the semiconductor element (1) to the interposer (5), metal nanowires (7) electrically connecting between electrodes of the semiconductor element (1) and the electrodes (2) of the interposer (5), an insulating material (8) sealing a region containing the semiconductor element (1) and the metal nanowires (7), and metal balls (9) mounted on the external electrodes (4). Patterns (10) are designed on corners of a region surrounded by electrodes (2) arranged on the interposer (5) in four directions.

Abstract: A lead frame includes: an outer frame section; a plurality of chip mounting sections which are supported by the outer frame section and on which a plurality of semiconductor chips are mounted; lead sections surrounding the chip mounting sections; connecting sections for connecting and supporting the lead sections and the outer frame section with each other; and an encapsulation region in which the chip mounting sections are encapsulated together in an encapsulation resin. An opening is provided in a plurality of regions of the outer frame section that are each located outside the encapsulation region and along the extension of one of the connecting sections.

Abstract: A lead frame includes: an outer frame section; a plurality of chip mounting sections which are supported by the outer frame section and on which a plurality of semiconductor chips are mounted; lead sections surrounding the chip mounting sections; connecting sections for connecting and supporting the lead sections and the outer frame section with each other; and an encapsulation region in which the chip mounting sections are encapsulated together in an encapsulation resin. An opening is provided in a plurality of regions of the outer frame section that are each located outside the encapsulation region and along the extension of one of the connecting sections.

Abstract: A lead frame includes: an outer frame section; a plurality of chip mounting sections which are supported by the outer frame section and on which a plurality of semiconductor chips are mounted; lead sections surrounding the chip mounting sections; connecting sections for connecting and supporting the lead sections and the outer frame section with each other; and an encapsulation region in which the chip mounting sections are encapsulated together in an encapsulation resin. An opening is provided in a plurality of regions of the outer frame section that are each located outside the encapsulation region and along the extension of one of the connecting sections.

Abstract: A lead frame includes: an outer frame section; a plurality of chip mounting sections which are supported by the outer frame section and on which a plurality of semiconductor chips are mounted; lead sections surrounding the chip mounting sections; connecting sections for connecting and supporting the lead sections and the outer frame section with each other; and an encapsulation region in which the chip mounting sections are encapsulated together in an encapsulation resin. An opening is provided in a plurality of regions of the outer frame section that are each located outside the encapsulation region and along the extension of one of the connecting sections.