Abstract: This image processing circuit performs, with reduced power consumption, pipeline processing of image data. This image processing circuit has an image processing unit which performs pipeline processing of image data having N-bit pixel data. The image processing unit has a pipeline register (400) having upper bit flip-flop circuits (401), lower-order bit flip-flop circuits (402), a comparison circuit (403) which determines whether the input values and the output values of the upper bit flip-flop circuits (401) are the same, and a clock gating control circuit (404) which controls supply of the clock signal such that, when the aforementioned input and output values are the same, the clock signal is not supplied to the upper bit flip-flop circuits (401). The pipeline register (400) does not have a circuit for controlling supply of the clock signal to the lower 1-bit flip-flop circuits (402), and holds pixel data or calculation results during pipeline processing.

Abstract: An image processing apparatus includes a blending layout information generating unit that generates blending layout information indicative of overlay information in a blended image of plural source images, a source necessity information generating unit that generates source necessity information indicative of unnecessary areas on the source image overwritten by the blending process, a source necessity information storing memory, and a source read masking unit that conducts a read masking control. A process of generating the blending layout information and the source necessity information, and a process of conducting the read masking control are executed in different frame processing periods, separately, to reduce a throughput necessary for generation of the source necessity information.

Abstract: An image processing apparatus includes a blending layout information generating unit that generates blending layout information indicative of overlay information in a blended image of plural source images, a source necessity information generating unit that generates source necessity information indicative of unnecessary areas on the source image overwritten by the blending process, a source necessity information storing memory, and a source read masking unit that conducts a read masking control. A process of generating the blending layout information and the source necessity information, and a process of conducting the read masking control are executed in different frame processing periods, separately, to reduce a throughput necessary for generation of the source necessity information.

Abstract: A connection unit for electrically connecting a DUT mounting board, on which an IC socket is mounted, with a testing apparatus for testing an electronic device inserted into the IC socket, the connection unit has a holding substrate provided to face the DUT mounting board and a connection-unit-side connector, which is provided on the holding substrate to be able to change a position of the connection-unit-side connector on the holding substrate, for being connected to a performance-board-side connector included in the DUT mounting board.

Abstract: An encoding unit (44) individually encodes display image-forming image data, i.e., image data from an image input unit (2), decoded data from a decoding unit (46), and graphics image data from a graphics-generating unit (47). A storing unit (45) stores the individually encoded image data. As a result, when a user intends to reuse, more specifically, replay, edit, or transmit the stored display image, the user can selectively decode required image elements, thereby reusing the selectively decoded image elements. This feature provides improved user-friendliness.

Abstract: A data processing apparatus comprises a plurality of calculating units connected each other in series, a plurality of memories connected in between the plurality of calculating units, and a control unit operable to determine a calculating unit, which performs calculation in a unit cycle, among the plurality of the calculating units. It is possible to reduce unnecessary power consumption in the data processing apparatus while completing processing in permissible processing time set by an application.

Abstract: A connection unit for electrically connecting a DUT mounting board, on which an IC socket is mounted, with a testing apparatus for testing an electronic device inserted into the IC socket, the connection unit has a holding substrate provided to face the DUT mounting board and a connection-unit-side connector, which is provided on the holding substrate to be able to change a position of the connection-unit-side connector on the holding substrate, for being connected to a performance-board-side connector included in the DUT mounting board.

Abstract: A connection unit for electrically connecting a DUT mounting board, on which an IC socket is mounted, with a testing apparatus for testing an electronic device inserted into the IC socket, the connection unit has a holding substrate provided to face the DUT mounting board and a connection-unit-side connector, which is provided on the holding substrate to be able to change a position of the connection-unit-side connector on the holding substrate, for being connected to a performance-board-side connector included in the DUT mounting board.

Abstract: A processor having a plurality of processing elements and a decoder operable to decode an instruction. Each of the plurality of processing elements includes: a transfer pattern storage unit operable to store a transfer pattern value that indicates a processing element from which data is transferred; a transfer unit operable to perform a data transfer from the processing element indicated by the transfer pattern value; and an update unit operable to update the transfer pattern value stored in the transfer pattern storage unit, in accordance with a result of decoding a latest instruction by the decoder.

Abstract: A semiconductor device (100) comprises a processor unit (110) including an internal CPU (113), an internal interface section (130), an external interface section (140) including an interface unit (143) connected to an external CPU (201), a plurality of processing circuits (121)-(126), and a connection control circuit (180). The internal interface section (130) includes a first bus (191) connected to the internal CPU (113), a second bus (192) connected to the external CPU (201) through the interface unit (143), and selecting circuits (131)-(136), controlled by the connection control circuit (180) according to the instruction of the internal CPU (113) or the external CPU (201), and operable to select respective connections of the plurality of processing circuits (121)-(126) to the first bus (191) or to the second bus (192). All the processing circuits (121)-(126) are controllable by the internal CPU (113) and the external CPU (201).

Abstract: A connection unit for electrically connecting a DUT mounting board, on which an IC socket is mounted, with a testing apparatus for testing an electronic device inserted into the IC socket, the connection unit has a holding substrate provided to face the DUT mounting board and a connection-unit-side connector, which is provided on the holding substrate to be able to change a position of the connection-unit-side connector on the holding substrate, for being connected to a performance-board-side connector included in the DUT mounting board.

Abstract: A connection unit for electrically connecting a DUT mounting board, on which an IC socket is mounted, with a testing apparatus for testing an electronic device inserted into the IC socket, the connection unit has a holding substrate provided to face the DUT mounting board and a connection-unit-side connector, which is provided on the holding substrate to be able to change a position of the connection-unit-side connector on the holding substrate, for being connected to a performance-board-side connector included in the DUT mounting board.

Abstract: A data processing apparatus comprises a plurality of calculating units connected each other in series, a plurality of memories connected in between the plurality of calculating units, and a control unit operable to determine a calculating unit, which performs calculation in a unit cycle, among the plurality of the calculating units. It is possible to reduce unnecessary power consumption in the data processing apparatus while completing processing in permissible processing time set by an application.

Abstract: An encoding unit (44) individually encodes display image-forming image data, i.e., image data from an image input unit (2), decoded data from a decoding unit (46), and graphics image data from a graphics-generating unit (47). A storing unit (45) stores the individually encoded image data. As a result, when a user intends to reuse, more specifically, replay, edit, or transmit the stored display image, the user can selectively decode required image elements, thereby reusing the selectively decoded image elements. This feature provides improved user-friendliness.

Abstract: A coupling unit for electrically coupling a performance board on which an electronic device is mounted and a tester control unit for generating a control signal for controlling a test of the electronic device includes a board containing unit for containing a test board electrically coupled to the tester control unit in order that the test board is replaceable on one of a plurality of different holding positions and a coupling cable whose one end is coupled to the test board held in the holding position and the other end is coupled to the performance board.

Abstract: A processor having a plurality of processing elements and a decoder operable to decode an instruction. Each of the plurality of processing elements includes: a transfer pattern storage unit operable to store a transfer pattern value that indicates a processing element from which data is transferred; a transfer unit operable to perform a data transfer from the processing element indicated by the transfer pattern value; and an update unit operable to update the transfer pattern value stored in the transfer pattern storage unit, in accordance with a result of decoding a latest instruction by the decoder.

Abstract: This data processing system comprises a first data processing unit, performing processing of data under program control, a plurality of second data processing units, each performing processing of data under wired logic control, a storage unit storing the data, a first data transfer unit, connecting the first data processing unit and the second processing unit via the storage unit, and a second data transfer unit, connecting the plural second data processing units. Since the second data transfer unit, connecting the plural second data processing units operating under wired logic control are provided, the data transfer between a plurality of the second data processing units can be performed via the second data transfer unit. From the reason described above, the frequency of the data transfer via the first data transfer unit can be suppressed.

Abstract: A coupling unit for electrically coupling a performance board on which an electronic device is mounted and a tester control unit for generating a control signal for controlling a test of the electronic device includes a board containing unit for containing a test board electrically coupled to the tester control unit in order that the test board is replaceable on one of a plurality of different holding positions and a coupling cable whose one end is coupled to the test board held in the holding position and the other end is coupled to the performance board.

Abstract: A connection unit for electrically connecting a DUT mounting board, on which an IC socket is mounted, with a testing apparatus for testing an electronic device inserted into the IC socket, the connection unit has a holding substrate provided to face the DUT mounting board and a connection-unit-side connector, which is provided on the holding substrate to be able to change a position of the connection-unit-side connector on the holding substrate, for being connected to a performance-board-side connector included in the DUT mounting board.

Abstract: A method of controlling a form of a strip in a rolling mill. A plurality of paired data of manipulation amounts of form control actuators, and amounts of variations in the form of the strip corresponding to the manipulation amounts are prepared, as prototype manipulation examples. Calculation is performed to obtain a degree of similarity between an actual form error representing difference between an actual form of the strip and a target form, and variations in the form of the prototype manipulation examples. Then, actuator manipulation amounts of the prototype manipulation examples are weighted in accordance with calculated degree of the similarity, and the actuators are manipulated based on weighted actuator manipulation amounts.