Patents by Inventor Masashi Ikeda

Masashi Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070201791
    Abstract: A higher order mode dispersion compensating fiber includes an optical fiber and a first loss layer which is provided within the fiber and which attenuates a lower order mode propagating through the optical fiber while not attenuating a higher order mode which is higher than the lower order mode. A dispersion compensating fiber mode converter for a higher order fiber includes a single mode fiber; a higher order mode dispersion compensating fiber; and a fused and extended portion which has been formed by fusing and extending the single mode fiber and the higher order mode fiber. The fused and extended portion converts between the LP01 mode of the single mode fiber and the LP02 mode of the higher order mode dispersion compensating fiber.
    Type: Application
    Filed: April 24, 2007
    Publication date: August 30, 2007
    Applicant: FUJIKURA LTD.
    Inventors: Ning Guan, Kazuhiko Aikawa, Masashi Ikeda, Kuniharu Himeno, Koichi Harada
  • Patent number: 7263267
    Abstract: A higher order mode dispersion compensating fiber includes an optical fiber and a first loss layer which is provided within the fiber and which attenuates a lower order mode propagating through the optical fiber while not attenuating a higher order mode which is higher than the lower order mode. A dispersion compensating fiber mode converter for a higher order fiber includes a single mode fiber; a higher order mode dispersion compensating fiber; and a fused and extended portion which has been formed by fusing and extending the single mode fiber and the higher order mode fiber. The fused and extended portion converts between the LP01 mode of the single mode fiber and the LP02 mode of the higher order mode dispersion compensating fiber.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: August 28, 2007
    Assignee: Fujikura Ltd.
    Inventors: Ning Guan, Kazuhiko Aikawa, Masashi Ikeda, Kuniharu Himeno, Koichi Harada
  • Publication number: 20060140565
    Abstract: An optical fiber that includes a core containing a first concentration of germanium, an inner cladding arranged on the core, the inner cladding containing a second concentration of germanium and having a first diffusion coefficient, and an outer cladding arranged on the inner cladding, the outer cladding having a second diffusion coefficient, where the first diffusion coefficient is larger than the second diffusion coefficient, and where the first concentration of germanium is about 200% or more of the second concentration of germanium. An optical fiber constructed in this manner can be spliced with an optical fiber having a different MFD, such as a single-mode optical fiber or an erbium-doped optical fiber, with low splice loss and a sufficient splicing strength.
    Type: Application
    Filed: February 16, 2006
    Publication date: June 29, 2006
    Inventors: Masashi Ikeda, Masakazu Nakayama, Kuniharu Himeno, Masaaki Ohtsuka, Masakazu Oohashi, Daiichiro Tanaka
  • Publication number: 20050135762
    Abstract: An optical fiber that includes a core containing a first concentration of germanium, an inner cladding arranged on the core, the inner cladding containing a second concentration of germanium and having a first diffusion coefficient, and an outer cladding arranged on the inner cladding, the outer cladding having a second diffusion coefficient, where the first diffusion coefficient is larger than the second diffusion coefficient, and where the first concentration of germanium is about 200% or more of the second concentration of germanium. An optical fiber constructed in this manner can be spliced with an optical fiber having a different MFD, such as a single-mode optical fiber or an erbium-doped optical fiber, with low splice loss and a sufficient splicing strength.
    Type: Application
    Filed: January 5, 2005
    Publication date: June 23, 2005
    Inventors: Masashi Ikeda, Masakazu Nakayama, Kuniharu Himeno, Masaaki Ohtsuka, Masakazu Oohashi, Daiichiro Tanaka
  • Publication number: 20050013572
    Abstract: A higher order mode dispersion compensating fiber includes an optical fiber and a first loss layer which is provided within the fiber and which attenuates a lower order mode propagating through the optical fiber while not attenuating a higher order mode which is higher than the lower order mode. A dispersion compensating fiber mode converter for a higher order fiber includes a single mode fiber; a higher order mode dispersion compensating fiber; and a fused and extended portion which has been formed by fusing and extending the single mode fiber and the higher order mode fiber. The fused and extended portion converts between the LP01 mode of the single mode fiber and the LP02 mode of the higher order mode dispersion compensating fiber.
    Type: Application
    Filed: June 15, 2004
    Publication date: January 20, 2005
    Inventors: Ning Guan, Kazuhiko Aikawa, Masashi Ikeda, Kuniharu Himeno, Koichi Harada
  • Patent number: 6700543
    Abstract: An antenna element has parallel first conductor and second conductor connected by a short-circuit conductor to form a loaded inductance. A ground conductor is also formed on an outer surface of a device substrate which is formed with a conductive line comprised of the first conductor, second conductor and short-circuit conductor. The ground conductor has a terminate end connected to the conductive line, and is applied with a ground potential at a leading end. Since the ground conductor functions in a manner similar to a conventional short pin, the antenna element can provide a radiation resistance twice as much.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: March 2, 2004
    Assignees: NEC Tokin Corporation, NEC Microwave Tube, Ltd.
    Inventors: Takayoshi Konishi, Masashi Ikeda, Kazuo Minegishi
  • Publication number: 20020190907
    Abstract: An antenna element has parallel first conductor and second conductor connected by a short-circuit conductor to form a loaded inductance. A ground conductor is also formed on an outer surface of a device substrate which is formed with a conductive line comprised of the first conductor, second conductor and short-circuit conductor. The ground conductor has a terminate end connected to the conductive line, and is applied with a ground potential at a leading end. Since the ground conductor functions in a manner similar to a conventional short pin, the antenna element can provide a radiation resistance twice as much.
    Type: Application
    Filed: April 25, 2002
    Publication date: December 19, 2002
    Inventors: Takayoshi Konishi, Masashi Ikeda, Kazuo Minegishi
  • Patent number: 6163300
    Abstract: In a multi-band antenna (10) being provided with an antenna element having an LC parallel resonance circuit (3) and a first and a second radiation element (1,2) connected to opposite ends of the LC parallel resonance circuit, the LC parallel resonance circuit is constituted by self-resonance of an inductor itself. A telescopic whip antenna may be constituted by combining a small-size antenna and a whip antenna which is receivable in a radio device casing and expandable.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: December 19, 2000
    Assignee: Tokin Corporation
    Inventors: Shigekazu Ishikawa, Makoto Teshima, Masashi Ikeda, Kazuo Minegishi
  • Patent number: 5322378
    Abstract: A label printer includes a thermal head, a keyboard unit for inputting label data including issuing number data determining the number of labels to be issued, a RAM for storing label data input by the keyboard unit, and a printing control circuit. The RAM at least first and second label data, and the printing control circuit performs a first label issuing operation in which the thermal head is driven to continuously print a label or labels according to the first label data read out from the RAM, interrupts the operation of the thermal head in response to an interrupt command input from the keyboard unit during the first label issuing operation and then changes the label issuing number data of the first label data stored in the RAM to indicate the number of remaining labels to be issued.
    Type: Grant
    Filed: November 23, 1992
    Date of Patent: June 21, 1994
    Assignee: Tokyo Electric Co., Ltd.
    Inventors: Masashi Ikeda, Kazuhide Takahama, Michio Suzuki
  • Patent number: 5241533
    Abstract: In a packet switching network, in order to transmit a packet effectively, after transmission of a first packet from a source node to a destination node, a data for inhibiting a packet from being repeating to a specific trunk line from a node is set in a routing table associated with the node in accordance with a second packet received from the node. The associated routing table stores trunk lines for repeating in accordance with the destination node of the packet. The second packet represents occurrence of trouble on a transmission route for the first packet from the source node to the destination node. The transmission node includes the trunk line from the node. When the node has received a third packet directed to the destination node, the associated routing table is referred to determine a trunk line for repeating the third packet from trunk lines except for the specific trunk line in accordance with the destination node and the repeating inhibition data.
    Type: Grant
    Filed: May 30, 1991
    Date of Patent: August 31, 1993
    Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd.
    Inventors: Atsushi Kimoto, Hironari Sakai, Michio Suzuki, Masashi Ikeda
  • Patent number: 5034945
    Abstract: A switching network having a plurality of repeater nodes, wherein each repeater node checks the number of times data packet has been received. If in excess of predetermined number, the repeater node transmits a looped trunk detection packet, the looped trunk detection packet being arranged to be written with the node address of each of the plurality of repeater nodes within a looped trunk as its repeating history. The repeater node checks whether the node address thereof is written in the repeating history or not. If the result is negative, the looped trunk detection packet is repeated and transmitted by writing the node address of the repeater node in the repeating history. If the result is positive, the repeater node does not repeat transmission of the succeeding packets from the repeater node to the route of the looped trunk, and transmits a looped trunk notification packet to repeater nodes.
    Type: Grant
    Filed: July 19, 1989
    Date of Patent: July 23, 1991
    Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd.
    Inventors: Atsushi Kimoto, Michio Suzuki, Masashi Ikeda
  • Patent number: 4489247
    Abstract: An integrated injection logic circuit includes a plurality of integrated injection logic gates each having a PNP transistor for injector and NPN transistor for signal inversion, and an injector common line to which the respective injector PNP transistors are commonly connected. A test pad for electric probing is provided at least one location of the injector common line.
    Type: Grant
    Filed: February 17, 1982
    Date of Patent: December 18, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Masashi Ikeda, Yukuya Tokumaru, Masanori Nakai, Masaki Ota
  • Patent number: 4443808
    Abstract: A semiconductor device having a high breakdown voltage transistor and a Schottky barrier diode. The Schottky barrier diode is formed in a surface portion of a semiconductor layer adjacent to the base region of the transistor, and a well layer of the same conductivity type as and of a lower impurity concentration that of the aforementioned semiconductor layer is formed under the Schottky barrier diode.
    Type: Grant
    Filed: April 2, 1982
    Date of Patent: April 17, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Kazuo Kihara, Masashi Ikeda
  • Patent number: 4428066
    Abstract: A semiconductor fused programmable read only memory having a fuse resistor formed on an insulator film of the surface of a substrate. An island region having a conductivity opposite to that of the surrounding region is formed below the fuse resistor for avoiding excess current flow through the substrate.
    Type: Grant
    Filed: April 22, 1981
    Date of Patent: January 24, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Kazuo Kihara, Masashi Ikeda
  • Patent number: 4337115
    Abstract: There is provided a method of forming an electrode on the surface of a semiconductor substrate which comprises the steps of(A) depositing on the surface of a semiconductor substrate an insulation layer provided with at least one opening for contact between the electrode and the semiconductor substrate;(B) coating a plurality of spacer layers made of insulation material on the surface of the insulation layer inclusive of the contact opening;(C) selectively depositing a photoresist layer on the uppermost are of said plural spacer layers, said uppermost spacer layer in direct contact with the photoresist layer being designed to be etched at a lower rate than the immediately underlying spacer layer;(D) using the photoresist layers as a mask to selectively etch the spacer layers until said opening is exposed;(E) depositing a metal layer on the surface of the semiconductor substrate inclusive of said opening and photoresist layer; and(F) removing the photoresist layer and the portions of the metal layer formed, suc
    Type: Grant
    Filed: April 4, 1980
    Date of Patent: June 29, 1982
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Masashi Ikeda, Shintaro Ito
  • Patent number: 4190949
    Abstract: Disclosed is a method for manufacturing a semiconductor device which comprises the steps of forming a first insulating film on a semiconductor substrate of one conductivity type which forms a collector region, boring an opening through the first insulating film to expose part of the substrate, forming a semiconductor layer on the exposed surface of the substrate and the first insulating film, forming a base-collector junction by introducing an impurity of the other conductivity type into the semiconductor layer, selectively removing the semiconductor layer to leave a semiconductor region consecutively connected to the exposed surface on the first insulating film, covering the semiconductor region with a second insulating film, and boring an opening through the second insulating film and introducing through the opening an impurity of the one conductivity type into the semiconductor region, whereby an emitter region is formed.
    Type: Grant
    Filed: November 14, 1978
    Date of Patent: March 4, 1980
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Masashi Ikeda, Kazuo Kihara