Patents by Inventor Masashi Inao

Masashi Inao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7969429
    Abstract: The collector, emitter, and base of a bipolar transistor circuit are connected to a high side power supply terminal, the drain of a level shift transistor, and a floating power supply terminal, respectively. When a high side output transistor is on, the floating power supply terminal is at the potential of a high potential power supply terminal. The high side power supply terminal is at a potential higher than the potential of the floating power supply terminal by a constant voltage. Turning the level shift transistor on, its drain potential drops below the potential of the floating power supply terminal; The base current flows through the bipolar transistor circuit and the drain potential of the level shift transistor is clamped near the potential of the floating power supply terminal; The bipolar transistor circuit is turned on and its collector current supplies the drain current of the level shift transistor.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: June 28, 2011
    Assignee: Panasonic Corporation
    Inventors: Masahiko Sasada, Hiroki Matsunaga, Masashi Inao, Hiroshi Ando, Jinsaku Kaneda, Eisaku Maeda, Akihiro Maejima
  • Patent number: 7358968
    Abstract: The collector, emitter, and base of a bipolar transistor circuit are connected to a high side power supply terminal, the drain of a level shift transistor, and a floating power supply terminal, respectively. When a high side output transistor is on, the floating power supply terminal is at the potential of a high potential power supply terminal. The high side power supply terminal is at a potential higher than the potential of the floating power supply terminal by a constant voltage. Turning the level shift transistor on, its drain potential drops below the potential of the floating power supply terminal; The base current flows through the bipolar transistor circuit and the drain potential of the level shift transistor is clamped near the potential of the floating power supply terminal; The bipolar transistor circuit is turned on and its collector current supplies the drain current of the level shift transistor.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: April 15, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiko Sasada, Hiroki Matsunaga, Masashi Inao, Hiroshi Ando, Jinsaku Kaneda, Eisaku Maeda, Akihiro Maejima
  • Publication number: 20080068368
    Abstract: The collector, emitter, and base of a bipolar transistor circuit are connected to a high side power supply terminal, the drain of a level shift transistor, and a floating power supply terminal, respectively. When a high side output transistor is on, the floating power supply terminal is at the potential of a high potential power supply terminal. The high side power supply terminal is at a potential higher than the potential of the floating power supply terminal by a constant voltage. Turning the level shift transistor on, its drain potential drops below the potential of the floating power supply terminal; The base current flows through the bipolar transistor circuit and the drain potential of the level shift transistor is clamped near the potential of the floating power supply terminal; The bipolar transistor circuit is turned on and its collector current supplies the drain current of the level shift transistor.
    Type: Application
    Filed: November 16, 2007
    Publication date: March 20, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Masahiko Sasada, Hiroki Matsunaga, Masashi Inao, Hiroshi Ando, Jinsaku Kaneda, Eisaku Maeda, Akihiro Maejima
  • Patent number: 7129779
    Abstract: A band gap circuit using NPN transistors (10, 12) having collectors connected to a power source voltage is employed, and transistor active regions of the NPN transistors (10, 12) and semiconductor elements constituting other signal processing circuits are integrated in the same floating block (19) with high voltage resistance. As a result, a reference voltage circuit used in the signal processing circuit can be integrated in a compact manner.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: October 31, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masashi Inao, Hiroki Matsunaga
  • Publication number: 20050189603
    Abstract: A band gap circuit using NPN transistors (10, 12) having collectors connected to a power source voltage is employed, and transistor active regions of the NPN transistors (10, 12) and semiconductor elements constituting other signal processing circuits are integrated in the same floating block (19) with high voltage resistance. As a result, a reference voltage circuit used in the signal processing circuit can be integrated in a compact manner.
    Type: Application
    Filed: February 3, 2005
    Publication date: September 1, 2005
    Applicant: Matsushita Elec. Ind. Co. Ltd.
    Inventors: Masashi Inao, Hiroki Matsunaga
  • Publication number: 20050134533
    Abstract: The collector, emitter, and base of a bipolar transistor circuit are connected to a high side power supply terminal, the drain of a level shift transistor, and a floating power supply terminal, respectively. When a high side output transistor is on, the floating power supply terminal is at the potential of a high potential power supply terminal. The high side power supply terminal is at a potential higher than the potential of the floating power supply terminal by a constant voltage. Turning the level shift transistor on, its drain potential drops below the potential of the floating power supply terminal; The base current flows through the bipolar transistor circuit and the drain potential of the level shift transistor is clamped near the potential of the floating power supply terminal; The bipolar transistor circuit is turned on and its collector current supplies the drain current of the level shift transistor.
    Type: Application
    Filed: November 17, 2004
    Publication date: June 23, 2005
    Inventors: Masahiko Sasada, Hiroki Matsunaga, Masashi Inao, Hiroshi Ando, Jinsaku Kaneda, Eisaku Maeda, Akihiro Maejima
  • Patent number: 6873126
    Abstract: A motor drive method for a motor driver having output circuits each including upper and lower side switching elements connected in series, and a current detection resistance connected in series with the output circuits in common. The motor drive method includes the steps of: turning ON a switching element on one side of one of the output circuits for a time period corresponding to a predetermined electrical angle; and repeatedly switching switching elements on the other side of a plurality of output circuits among the remaining ones of the output circuits. In the switching step, each of a plurality of periods obtained by dividing the time period corresponding to the predetermined electrical angle includes a first period in which one of the switching elements to be switched is turned ON and a second period in which another one of the switching elements is turned ON.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: March 29, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masashi Inao, Yasunori Yamamoto, Taishi Iwanaga, Tomoharu Yokouchi, Hirofumi Sakai
  • Patent number: 6674258
    Abstract: A motor driver having output circuits each including upper and lower side switching elements connected in series. The motor driver includes: a current detection resistance connected in series with the output circuits in common; a phase switch circuit for turning ON a switching element on one side of one of the output circuits for a time period corresponding to a predetermined electrical angle and switching switching elements on the other side of a plurality of output circuits among the remaining ones of the output circuits; and an ON-period control section for generating a signal for controlling the switching operation so that each of periods obtained by dividing the time period includes a first period in which a plurality of switching elements are turned ON and a second period in which one of the switching elements turned ON in the first period is kept ON.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: January 6, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirofumi Sakai, Tomoharu Yokouchi, Yasunori Yamamoto, Masashi Inao, Taishi Iwanaga
  • Publication number: 20040000884
    Abstract: A motor drive method for a motor driver having output circuits each including upper and lower side switching elements connected in series, and a current detection resistance connected in series with the output circuits in common. The motor drive method includes the steps of: turning ON a switching element on one side of one of the output circuits for a time period corresponding to a predetermined electrical angle; and repeatedly switching switching elements on the other side of a plurality of output circuits among the remaining ones of the output circuits. In the switching step, each of a plurality of periods obtained by dividing the time period corresponding to the predetermined electrical angle includes a first period in which one of the switching elements to be switched is turned ON and a second period in which another one of the switching elements is turned ON.
    Type: Application
    Filed: June 30, 2003
    Publication date: January 1, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masashi Inao, Yasunori Yamamoto, Taishi Iwanaga, Tomoharu Yokouchi, Hirofumi Sakai
  • Publication number: 20020195981
    Abstract: A motor driver having output circuits each including upper and lower side switching elements connected in series. The motor driver includes: a current detection resistance connected in series with the output circuits in common; a phase switch circuit for turning ON a switching element on one side of one of the output circuits for a time period corresponding to a predetermined electrical angle and switching switching elements on the other side of a plurality of output circuits among the remaining ones of the output circuits; and an ON-period control section for generating a signal for controlling the switching operation so that each of periods obtained by dividing the time period includes a first period in which a plurality of switching elements are turned ON and a second period in which one of the switching elements turned ON in the first period is kept ON.
    Type: Application
    Filed: June 20, 2002
    Publication date: December 26, 2002
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hirofumi Sakai, Tomoharu Yokouchi, Yasunori Yamamoto, Masashi Inao, Taishi Iwanaga