Patents by Inventor Masashi Inao
Masashi Inao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7969429Abstract: The collector, emitter, and base of a bipolar transistor circuit are connected to a high side power supply terminal, the drain of a level shift transistor, and a floating power supply terminal, respectively. When a high side output transistor is on, the floating power supply terminal is at the potential of a high potential power supply terminal. The high side power supply terminal is at a potential higher than the potential of the floating power supply terminal by a constant voltage. Turning the level shift transistor on, its drain potential drops below the potential of the floating power supply terminal; The base current flows through the bipolar transistor circuit and the drain potential of the level shift transistor is clamped near the potential of the floating power supply terminal; The bipolar transistor circuit is turned on and its collector current supplies the drain current of the level shift transistor.Type: GrantFiled: November 16, 2007Date of Patent: June 28, 2011Assignee: Panasonic CorporationInventors: Masahiko Sasada, Hiroki Matsunaga, Masashi Inao, Hiroshi Ando, Jinsaku Kaneda, Eisaku Maeda, Akihiro Maejima
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Patent number: 7358968Abstract: The collector, emitter, and base of a bipolar transistor circuit are connected to a high side power supply terminal, the drain of a level shift transistor, and a floating power supply terminal, respectively. When a high side output transistor is on, the floating power supply terminal is at the potential of a high potential power supply terminal. The high side power supply terminal is at a potential higher than the potential of the floating power supply terminal by a constant voltage. Turning the level shift transistor on, its drain potential drops below the potential of the floating power supply terminal; The base current flows through the bipolar transistor circuit and the drain potential of the level shift transistor is clamped near the potential of the floating power supply terminal; The bipolar transistor circuit is turned on and its collector current supplies the drain current of the level shift transistor.Type: GrantFiled: November 17, 2004Date of Patent: April 15, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masahiko Sasada, Hiroki Matsunaga, Masashi Inao, Hiroshi Ando, Jinsaku Kaneda, Eisaku Maeda, Akihiro Maejima
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Publication number: 20080068368Abstract: The collector, emitter, and base of a bipolar transistor circuit are connected to a high side power supply terminal, the drain of a level shift transistor, and a floating power supply terminal, respectively. When a high side output transistor is on, the floating power supply terminal is at the potential of a high potential power supply terminal. The high side power supply terminal is at a potential higher than the potential of the floating power supply terminal by a constant voltage. Turning the level shift transistor on, its drain potential drops below the potential of the floating power supply terminal; The base current flows through the bipolar transistor circuit and the drain potential of the level shift transistor is clamped near the potential of the floating power supply terminal; The bipolar transistor circuit is turned on and its collector current supplies the drain current of the level shift transistor.Type: ApplicationFiled: November 16, 2007Publication date: March 20, 2008Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Masahiko Sasada, Hiroki Matsunaga, Masashi Inao, Hiroshi Ando, Jinsaku Kaneda, Eisaku Maeda, Akihiro Maejima
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Patent number: 7129779Abstract: A band gap circuit using NPN transistors (10, 12) having collectors connected to a power source voltage is employed, and transistor active regions of the NPN transistors (10, 12) and semiconductor elements constituting other signal processing circuits are integrated in the same floating block (19) with high voltage resistance. As a result, a reference voltage circuit used in the signal processing circuit can be integrated in a compact manner.Type: GrantFiled: February 3, 2005Date of Patent: October 31, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masashi Inao, Hiroki Matsunaga
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Publication number: 20050189603Abstract: A band gap circuit using NPN transistors (10, 12) having collectors connected to a power source voltage is employed, and transistor active regions of the NPN transistors (10, 12) and semiconductor elements constituting other signal processing circuits are integrated in the same floating block (19) with high voltage resistance. As a result, a reference voltage circuit used in the signal processing circuit can be integrated in a compact manner.Type: ApplicationFiled: February 3, 2005Publication date: September 1, 2005Applicant: Matsushita Elec. Ind. Co. Ltd.Inventors: Masashi Inao, Hiroki Matsunaga
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Publication number: 20050134533Abstract: The collector, emitter, and base of a bipolar transistor circuit are connected to a high side power supply terminal, the drain of a level shift transistor, and a floating power supply terminal, respectively. When a high side output transistor is on, the floating power supply terminal is at the potential of a high potential power supply terminal. The high side power supply terminal is at a potential higher than the potential of the floating power supply terminal by a constant voltage. Turning the level shift transistor on, its drain potential drops below the potential of the floating power supply terminal; The base current flows through the bipolar transistor circuit and the drain potential of the level shift transistor is clamped near the potential of the floating power supply terminal; The bipolar transistor circuit is turned on and its collector current supplies the drain current of the level shift transistor.Type: ApplicationFiled: November 17, 2004Publication date: June 23, 2005Inventors: Masahiko Sasada, Hiroki Matsunaga, Masashi Inao, Hiroshi Ando, Jinsaku Kaneda, Eisaku Maeda, Akihiro Maejima
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Patent number: 6873126Abstract: A motor drive method for a motor driver having output circuits each including upper and lower side switching elements connected in series, and a current detection resistance connected in series with the output circuits in common. The motor drive method includes the steps of: turning ON a switching element on one side of one of the output circuits for a time period corresponding to a predetermined electrical angle; and repeatedly switching switching elements on the other side of a plurality of output circuits among the remaining ones of the output circuits. In the switching step, each of a plurality of periods obtained by dividing the time period corresponding to the predetermined electrical angle includes a first period in which one of the switching elements to be switched is turned ON and a second period in which another one of the switching elements is turned ON.Type: GrantFiled: June 30, 2003Date of Patent: March 29, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masashi Inao, Yasunori Yamamoto, Taishi Iwanaga, Tomoharu Yokouchi, Hirofumi Sakai
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Patent number: 6674258Abstract: A motor driver having output circuits each including upper and lower side switching elements connected in series. The motor driver includes: a current detection resistance connected in series with the output circuits in common; a phase switch circuit for turning ON a switching element on one side of one of the output circuits for a time period corresponding to a predetermined electrical angle and switching switching elements on the other side of a plurality of output circuits among the remaining ones of the output circuits; and an ON-period control section for generating a signal for controlling the switching operation so that each of periods obtained by dividing the time period includes a first period in which a plurality of switching elements are turned ON and a second period in which one of the switching elements turned ON in the first period is kept ON.Type: GrantFiled: June 20, 2002Date of Patent: January 6, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hirofumi Sakai, Tomoharu Yokouchi, Yasunori Yamamoto, Masashi Inao, Taishi Iwanaga
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Publication number: 20040000884Abstract: A motor drive method for a motor driver having output circuits each including upper and lower side switching elements connected in series, and a current detection resistance connected in series with the output circuits in common. The motor drive method includes the steps of: turning ON a switching element on one side of one of the output circuits for a time period corresponding to a predetermined electrical angle; and repeatedly switching switching elements on the other side of a plurality of output circuits among the remaining ones of the output circuits. In the switching step, each of a plurality of periods obtained by dividing the time period corresponding to the predetermined electrical angle includes a first period in which one of the switching elements to be switched is turned ON and a second period in which another one of the switching elements is turned ON.Type: ApplicationFiled: June 30, 2003Publication date: January 1, 2004Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Masashi Inao, Yasunori Yamamoto, Taishi Iwanaga, Tomoharu Yokouchi, Hirofumi Sakai
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Publication number: 20020195981Abstract: A motor driver having output circuits each including upper and lower side switching elements connected in series. The motor driver includes: a current detection resistance connected in series with the output circuits in common; a phase switch circuit for turning ON a switching element on one side of one of the output circuits for a time period corresponding to a predetermined electrical angle and switching switching elements on the other side of a plurality of output circuits among the remaining ones of the output circuits; and an ON-period control section for generating a signal for controlling the switching operation so that each of periods obtained by dividing the time period includes a first period in which a plurality of switching elements are turned ON and a second period in which one of the switching elements turned ON in the first period is kept ON.Type: ApplicationFiled: June 20, 2002Publication date: December 26, 2002Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hirofumi Sakai, Tomoharu Yokouchi, Yasunori Yamamoto, Masashi Inao, Taishi Iwanaga