Abstract: Switch sections composed of a plurality of FETs 111 to 118 and 121 to 128 connected in series are provided between input/output terminals 161 and 162 and ground terminals 181 and 182, and between the input/output terminals 161 to 163. A plurality of gate bias resistors 131 to 138, 141 to 148 are also provided. One terminal of each gate bias resistor is connected to a gate electrode of a corresponding one of the FETs 111 to 118 and 121 to 128, while a control voltage 171 and 172 for switching an ON state and an OFF state of the switch section is applied to the other terminal. Among the FETs included in each switch section, concerning the FETs 114, 115, 124, and 125 to which signal power is applied when the switch section is in the OFF state, the gate bias resistors 134, 135, 144, and 145 connected to the gate electrodes are set to have a highest resistance value.

Abstract: A radio frequency switching circuit having improved input/output power characteristics is provided. The circuit includes basic switching sections each including a plurality of FETs 13a-13d, 14a-14d, 11a-11d or 12a-12d connected in series. The basic switching sections are respectively provided between an input/output terminal 1 and the ground, between an input/output terminal 3 and the ground, between the input terminals 1 and 2, and between the input terminals 2 and 3. The circuit also includes a plurality of resistors 43a-43d, 44a-44d, 41a-41d and 42a-42d, each having one terminal connected to a drain electrode of a corresponding FET and the other terminal connected to a source electrode of the corresponding FET. A resistor connected between the drain and source electrodes of an FET, among the FETs included in a basic switching section in an OFF state, closer to the input/output terminal to which a signal is inputted has a smaller resistance value.

Abstract: Switch sections composed of a plurality of FETs 111 to 118 and 121 to 128 connected in series are provided between input/output terminals 161 and 162 and ground terminals 181 and 182, and between the input/output terminals 161 to 163. A plurality of gate bias resistors 131 to 138, 141 to 148 are also provided. One terminal of each gate bias resistor is connected to a gate electrode of a corresponding one of the FETs 111 to 118 and 121 to 128, while a control voltage 171 and 172 for switching an ON state and an OFF state of the switch section is applied to the other terminal. Among the FETs included in each switch section, concerning the FETs 114, 115, 124, and 125 to which signal power is applied when the switch section is in the OFF state, the gate bias resistors 134, 135, 144, and 145 connected to the gate electrodes are set to have a highest resistance value.