Patents by Inventor Masashi Natsume

Masashi Natsume has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10284181
    Abstract: A variable capacitor includes: capacitors connected in series between first and second signal terminals, capacitances of the capacitors varying in accordance with variable voltage applied to a variable terminal; a first resistor connected between a first node between adjacent capacitors of the capacitors and the variable terminal, a second resistor connected between a second node between adjacent capacitors of the capacitors and a fixed terminal applied with fixed voltage, and a third resistor connected between a third node and the fixed terminal, the third node being located between the first and/or second signal terminal and a capacitor located closest to the first and/or signal terminal among the capacitors, wherein a resistance of the second resistor is less than 1 and ½ or greater with respect to a resistance of the third resistor, and the resistance of the second resistor is not equal to a resistance of the first resistor.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: May 7, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Masashi Natsume, Tomokazu Ikenaga
  • Patent number: 10044105
    Abstract: A variable capacitance device includes: (A) a first signal line that contains multiple first variable capacitance elements connected in series; (B) a second signal line that contains multiple second variable capacitance elements connected in series; (C) a first bias line used for applying a first direct-current voltage to each of the multiple first variable capacitance elements and multiple second variable capacitance elements; and (D) a second bias line used for applying a second direct-current voltage to each of the multiple first variable capacitance elements and multiple second variable capacitance elements. And, a part of at least one of the first bias line and second bias line is arranged so that it passes between two adjacent first variable capacitance elements among the multiple first variable capacitance elements.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: August 7, 2018
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kentaro Morito, Daiki Ishii, Masashi Natsume, Tomokazu Ikenaga
  • Patent number: 9929468
    Abstract: The variable capacitance device includes one or more of directional elements inserted between the third and fourth terminals that allow current to pass only in prescribed directions, such that a diagram formed of current paths from the third terminal to the fourth terminal for the plurality of third-terminal side resistors and the plurality of fourth-terminal side resistors when the third terminal is biased higher than the fourth terminal is line-symmetric to a diagram formed of current paths from the fourth terminal to the third terminal for the plurality of third-terminal side resistors and the plurality of fourth-terminal side resistors when the fourth terminal is biased higher than the third terminal, with respect to the serial chain of variable capacitance elements between the first and second terminals.
    Type: Grant
    Filed: August 11, 2015
    Date of Patent: March 27, 2018
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Tomokazu Ikenaga, Daiki Ishii, Masashi Natsume
  • Publication number: 20180006634
    Abstract: A variable capacitor includes: capacitors connected in series between first and second signal terminals, capacitances of the capacitors varying in accordance with variable voltage applied to a variable terminal; a first resistor connected between a first node between adjacent capacitors of the capacitors and the variable terminal, a second resistor connected between a second node between adjacent capacitors of the capacitors and a fixed terminal applied with fixed voltage, and a third resistor connected between a third node and the fixed terminal, the third node being located between the first and/or second signal terminal and a capacitor located closest to the first and/or signal terminal among the capacitors, wherein a resistance of the second resistor is less than 1 and ½ or greater with respect to a resistance of the third resistor, and the resistance of the second resistor is not equal to a resistance of the first resistor.
    Type: Application
    Filed: March 8, 2017
    Publication date: January 4, 2018
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Masashi NATSUME, Tomokazu IKENAGA
  • Publication number: 20160254599
    Abstract: A variable capacitance device includes: (A) a first signal line that contains multiple first variable capacitance elements connected in series; (B) a second signal line that contains multiple second variable capacitance elements connected in series; (C) a first bias line used for applying a first direct-current voltage to each of the multiple first variable capacitance elements and multiple second variable capacitance elements; and (D) a second bias line used for applying a second direct-current voltage to each of the multiple first variable capacitance elements and multiple second variable capacitance elements. And, a part of at least one of the first bias line and second bias line is arranged so that it passes between two adjacent first variable capacitance elements among the multiple first variable capacitance elements.
    Type: Application
    Filed: October 3, 2014
    Publication date: September 1, 2016
    Inventors: Kentaro MORITO, Daiki ISHII, Masashi NATSUME, Tomokazu IKENAGA
  • Publication number: 20160049730
    Abstract: The variable capacitance device includes one or more of directional elements inserted between the third and fourth terminals that allow current to pass only in prescribed directions, such that a diagram formed of current paths from the third terminal to the fourth terminal for the plurality of third-terminal side resistors and the plurality of fourth-terminal side resistors when the third terminal is biased higher than the fourth terminal is line-symmetric to a diagram formed of current paths from the fourth terminal to the third terminal for the plurality of third-terminal side resistors and the plurality of fourth-terminal side resistors when the fourth terminal is biased higher than the third terminal, with respect to the serial chain of variable capacitance elements between the first and second terminals.
    Type: Application
    Filed: August 11, 2015
    Publication date: February 18, 2016
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Tomokazu Ikenaga, Daiki Ishii, Masashi Natsume