Patents by Inventor Masashi Nishimura

Masashi Nishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080043400
    Abstract: A monolithic capacitor includes a laminate of ceramic layers, the laminate having first and second surfaces, at least one pair of first and second internal electrodes, first and second external electrodes disposed on the first surface, third and fourth external electrodes disposed on the second surface, a first via conductor that electrically connects the first external electrode to the first internal electrode and to the third external electrode and that contains a metal oxide, and a second via conductor that electrically connects the second external electrode to the second internal electrode and to the fourth external electrode and that contains a metal oxide, wherein, in each of the first and second via conductors, the metal oxide content at an end on the second surface side is higher than the metal oxide content at a center or at an end on the first surface side.
    Type: Application
    Filed: August 10, 2007
    Publication date: February 21, 2008
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Hidetaka Fukudome, Masashi Nishimura, Masaaki Taniguchi, Yoshio Kawaguchi
  • Patent number: 7141113
    Abstract: A method for growing a silicon crystal by a Czochralsky method, wherein, let a pulling speed be V (mm/min) and an average value of an in-crystal temperature gradient in a pulling axis direction within a temperature range, a silicon melting point to 1350° C., be G (° C./mm), V/G ranges from 0.16 to 0.18 mm2/° C. min between a crystal center position and a crystal outer periphery position, and a ratio G outer/G center of an average value G of an in-crystal temperature gradient in a pulling axis direction within a temperature range, a silicon melting point to 1350° C., at a crystal outer surface to that at a crystal center is set to up to 1.10 to thereby obtain a high-quality perfect crystal silicon wafer. Such a perfect crystal silicon wafer, wherein an oxygen concentration is controlled to up to 13×1017 atoms/cm3, an initial heat treatment temperature is at least up to 500° C. and a temperature is raised at up to 1° C./min at least within 700 to 900° C.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: November 28, 2006
    Assignee: Komatsu Denshi Kinzoku Kabushiki Kaisha
    Inventors: Kozo Nakamura, Toshiaki Saishoji, Hirotaka Nakajima, Shinya Sadohara, Masashi Nishimura, Toshirou Kotooka, Yoshiyuki Shimanuki
  • Patent number: 5744380
    Abstract: There is provided a high quality epitaxial water on which the density of microscopic defects in the epitaxial layer is reduced to keep the GOI thereof sufficiently high and to reduce a leakage current at the P-N junction thereof when devices are incorporated, to thereby improve the yield of such devices. In an epitaxial wafer obtained by forming an epitaxial layer on a substrate, the density of IR laser scatterers is 5.times.10.sup.5 pieces/cm.sup.3 or less throughout the epitaxial layer.
    Type: Grant
    Filed: February 26, 1997
    Date of Patent: April 28, 1998
    Assignee: Komatsu Electronic Metals Co., Ltd.
    Inventors: Noriyuki Uemura, Hisami Motoura, Masashi Nishimura, Mitsuo Kohno
  • Patent number: 5710492
    Abstract: In a power system wherein a plurality of power plants, load systems and power transmission components are connected to each other for increasing the power transmission capacity of the power system, the power system is stabilized and power swings are suppressed, by controlling a semiconductor switch used in a power system stabilizing apparatus which is provided at the power system in an applying manner adequately corresponding to its operation characteristics and function, in accordance with a stabilizing command signal generated by using state values (for example, voltage, current, power, frequency, phase angle) of the power system, detected by detecting circuits provided in the power system.
    Type: Grant
    Filed: December 20, 1995
    Date of Patent: January 20, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hiroo Konishi, Masahiko Amano, Masahiro Watanabe, Masashi Nishimura