Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.

Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.

Abstract: The present technology relates to a solid-state imaging device and an electronic device for increasing the degree of freedom regarding arrangement of transistors. Provided are a photoelectric conversion unit, a trench penetrating a semiconductor substrate in a depth direction and formed between the photoelectric conversion units respectively formed in adjacent pixels, and a PN junction region configured by a P-type region and an N-type region on a sidewall of the trench, in which a part of sides surrounding the photoelectric conversion unit includes a region where the P-type region is not formed or a region where the P-type region is thinly formed. The PN junction region is formed on at least one side of four sides surrounding the photoelectric conversion unit, and the P-type region is not formed on the remaining sides. The present technology can be applied to, for example, a back-illuminated-type CMOS image sensor.

Abstract: The present technology relates to a solid-state imaging device capable of suppressing deterioration in dark characteristics, and an electronic apparatus. The device includes a photoelectric conversion section; a trench between the photoelectric conversion sections in adjacent pixels; and a PN junction region on a sidewall of the trench and including a P-type region and an N-type region, the P-type region having a protruding region. The device can include an inorganic photoelectric conversion section having a pn junction and an organic photoelectric conversion section having an organic photoelectric conversion film that are stacked in a depth direction within a same pixel; and a PN junction region on a sidewall of the inorganic photoelectric conversion section. The PN junction region can further include a first P-type region and an N-type region; and a second P-type region. The present technology can be applied to, for example, a back-illuminated CMOS image sensor.

Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.

Abstract: The present technology relates to an imaging element and electronic equipment that enable an increase in the amount of saturated charge. The imaging element includes a substrate, a first photoelectric conversion region adjacent a second photoelectric conversion region in the substrate, a pixel isolation section between the first photoelectric conversion region and the second photoelectric conversion region, and a junction region in a side wall of the pixel isolation section, the junction region including a first impurity region including first impurities and a second impurity region including second impurities. The length of a side of the first impurity region, the side perpendicularly intersecting two parallel sides of four sides of the pixel isolation section enclosing the first photoelectric conversion region, is larger than the length between the two parallel sides of the pixel isolation section. The present technology is applicable to, for example, an imaging apparatus.

Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.

Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.

Abstract: The present technology relates to a solid-state imaging device and an electronic device for increasing the degree of freedom regarding arrangement of transistors. Provided are a photoelectric conversion unit, a trench penetrating a semiconductor substrate in a depth direction and formed between the photoelectric conversion units respectively formed in adjacent pixels, and a PN junction region configured by a P-type region and an N-type region on a sidewall of the trench, in which a part of sides surrounding the photoelectric conversion unit includes a region where the P-type region is not formed or a region where the P-type region is thinly formed. The PN junction region is formed on at least one side of four sides surrounding the photoelectric conversion unit, and the P-type region is not formed on the remaining sides. The present technology can be applied to, for example, a back-illuminated-type CMOS image sensor.

Abstract: The present technology relates to a solid-state imaging device capable of suppressing deterioration in dark characteristics, and an electronic apparatus. The device includes a photoelectric conversion section; a trench between the photoelectric conversion sections in adjacent pixels; and a PN junction region on a sidewall of the trench and including a P-type region and an N-type region, the P-type region having a protruding region. The device can include an inorganic photoelectric conversion section having a pn junction and an organic photoelectric conversion section having an organic photoelectric conversion film that are stacked in a depth direction within a same pixel; and a PN junction region on a sidewall of the inorganic photoelectric conversion section. The PN junction region can further include a first P-type region and an N-type region; and a second P-type region. The present technology can be applied to, for example, a back-illuminated CMOS image sensor.