Patents by Inventor Masashi Oota

Masashi Oota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9496330
    Abstract: A crystalline oxide semiconductor film which can be used as a semiconductor film of a transistor or the like is provided. In particular, a crystalline oxide semiconductor film with less defects such as grain boundaries is provided. One embodiment of the present invention is a crystalline oxide semiconductor film which is provided over a substrate and has a region including five or less areas where a transmission electron diffraction pattern showing discontinuous points is observed when an observation area is changed one-dimensionally within a range of 700 nm, using a transmission electron diffraction apparatus with an electron beam having a probe diameter of 1 nm.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: November 15, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Masashi Oota, Koji Dairiki, Masahiro Takahashi
  • Publication number: 20160284860
    Abstract: Defects in an oxide semiconductor film are reduced in a semiconductor device including the oxide semiconductor film. The electrical characteristics of a semiconductor device including an oxide semiconductor film are improved. The reliability of a semiconductor device including an oxide semiconductor film is improved. A semiconductor device including an oxide semiconductor layer; a metal oxide layer in contact with the oxide semiconductor layer, the metal oxide layer including an In-M oxide (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf); and a conductive layer in contact with the metal oxide layer, the conductive layer including copper, aluminum, gold, or silver is provided. In the semiconductor device, y/(x+y) is greater than or equal to 0.75 and less than 1 where the atomic ratio of In to M included in the metal oxide layer is In:M=x:y.
    Type: Application
    Filed: June 6, 2016
    Publication date: September 29, 2016
    Inventors: Noritaka ISHIHARA, Masashi OOTA, Masashi TSUBUKU, Masami JINTYOU, Yukinori SHIMA, Junichi KOEZUKA, Yasuharu HOSAKA, Shunpei YAMAZAKI
  • Patent number: 9437428
    Abstract: To provide a method for manufacturing a semiconductor device including an oxide semiconductor film having conductivity, or a method for manufacturing a semiconductor device including an oxide semiconductor film having a light-transmitting property and conductivity. The method for manufacturing a semiconductor device includes the steps of forming an oxide semiconductor film over a first insulating film, performing first heat treatment in an atmosphere where oxygen contained in the oxide semiconductor film is released, and performing second heat treatment in a hydrogen-containing atmosphere, so that an oxide semiconductor film having conductivity is formed.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: September 6, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Oota, Noritaka Ishihara, Motoki Nakashima, Yoichi Kurosawa, Shunpei Yamazaki, Yasuharu Hosaka, Toshimitsu Obonai, Junichi Koezuka
  • Patent number: 9425217
    Abstract: Defects in an oxide semiconductor film are reduced in a semiconductor device including the oxide semiconductor film. The electrical characteristics of a semiconductor device including an oxide semiconductor film are improved. The reliability of a semiconductor device including an oxide semiconductor film is improved. A semiconductor device including an oxide semiconductor layer; a metal oxide layer in contact with the oxide semiconductor layer, the metal oxide layer including an In-M oxide (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf); and a conductive layer in contact with the metal oxide layer, the conductive layer including copper, aluminum, gold, or silver is provided. In the semiconductor device, y/(x+y) is greater than or equal to 0.75 and less than 1 where the atomic ratio of In to M included in the metal oxide layer is In:M=x:y.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: August 23, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Noritaka Ishihara, Masashi Oota, Masashi Tsubuku, Masami Jintyou, Yukinori Shima, Junichi Koezuka, Yasuharu Hosaka, Shunpei Yamazaki
  • Patent number: 9406760
    Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: August 2, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihisa Shimomura, Yasumasa Yamane, Yuhei Sato, Takahisa Ishiyama, Kenichi Okazaki, Chiho Kawanabe, Masashi Oota, Noritaka Ishihara
  • Publication number: 20160197193
    Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.
    Type: Application
    Filed: March 14, 2016
    Publication date: July 7, 2016
    Inventors: Akihisa SHIMOMURA, Yasumasa YAMANE, Yuhei SATO, Takahisa ISHIYAMA, Kenichi OKAZAKI, Chiho KAWANABE, Masashi OOTA, Noritaka ISHIHARA
  • Publication number: 20160190346
    Abstract: The semiconductor device includes a first insulator over a substrate, a first oxide semiconductor over the first insulator, a second oxide semiconductor over the first oxide semiconductor, a first conductor and a second conductor in contact with the second oxide semiconductor, a third oxide semiconductor on the second oxide semiconductor and the first and second conductors, a second insulator over the third oxide semiconductor, and a third conductor over the second insulator. At least one of the first oxide semiconductor, the second oxide semiconductor, and the third oxide semiconductor has a crystallinity peak that corresponds to a (hkl) plane (h=0, k=0, l is a natural number) observed by X-ray diffraction using a Cu K-alpha radiation as a radiation source. The peak appears at a diffraction angle 2 theta greater than or equal to 31.3 degrees and less than 33.5 degrees.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 30, 2016
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya KAWATA, Masashi OOTA, Yusuke NONAKA, Shunpei YAMAZAKI
  • Publication number: 20160190232
    Abstract: A highly reliable semiconductor device including an oxide semiconductor is provided. Provided is a semiconductor device including an oxide semiconductor layer, an insulating layer in contact with the oxide semiconductor layer, a gate electrode layer overlapping with the oxide semiconductor layer, and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The oxide semiconductor layer includes a first region having a crystal whose size is less than or equal to 10 nm and a second region which overlaps with the insulating layer with the first region provided therebetween and which includes a crystal part whose c-axis is aligned in a direction parallel to a normal vector of the surface of the oxide semiconductor layer.
    Type: Application
    Filed: March 8, 2016
    Publication date: June 30, 2016
    Inventors: Shunpei YAMAZAKI, Masahiro TAKAHASHI, Takuya HIROHASHI, Masashi TSUBUKU, Masashi OOTA
  • Publication number: 20160181432
    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.
    Type: Application
    Filed: February 25, 2016
    Publication date: June 23, 2016
    Inventors: Masashi TSUBUKU, Yusuke NONAKA, Noritaka ISHIHARA, Masashi OOTA, Hideyuki KISHIDA
  • Publication number: 20160160342
    Abstract: A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.
    Type: Application
    Filed: January 26, 2016
    Publication date: June 9, 2016
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Masashi OOTA, Yoichi KUROSAWA, Noritaka ISHIHARA
  • Publication number: 20160155852
    Abstract: After a sputtering gas is supplied to a deposition chamber, plasma including an ion of the sputtering gas is generated in the vicinity of a target. The ion of the sputtering gas is accelerated and collides with the target, so that flat-plate particles and atoms of the target are separated from the target. The flat-plate particles are deposited with a gap therebetween so that the flat plane faces a substrate. The atom and the aggregate of the atoms separated from the target enter the gap between the deposited flat-plate particles and grow in the plane direction of the substrate to fill the gap. A film is formed over the substrate. After the deposition, heat treatment is performed at high temperature in an oxygen atmosphere, which forms an oxide with a few oxygen vacancies and high crystallinity.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 2, 2016
    Inventors: Shunpei YAMAZAKI, Haruyuki BABA, Akio SUZUKI, Hiromi SAWAI, Masahiko HAYAKAWA, Noritaka ISHIHARA, Masashi OOTA
  • Patent number: 9349875
    Abstract: A semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, a source electrode in contact with the second oxide semiconductor film, a drain electrode in contact with the second oxide semiconductor film, a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the metal oxide film, and a gate electrode over the gate insulating film. The metal oxide film contains M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn. The metal oxide film includes a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when a target has an atomic ratio of M:Zn=x:y.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: May 24, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Toshihiko Takeuchi, Yasumasa Yamane, Masashi Oota
  • Patent number: 9343578
    Abstract: A semiconductor device includes an oxide semiconductor layer over a first oxide layer; first source and drain electrodes over the oxide semiconductor layer; second source and drain electrodes over the first source and drain electrodes respectively; a second oxide layer over the first source and drain electrodes; a gate insulating layer over the second source and drain electrodes and the second oxide layer; and a gate electrode overlapping the oxide semiconductor layer with the gate insulating layer provided therebetween. The structure in which the oxide semiconductor layer is sandwiched by the oxide layers can suppress the entry of impurities into the oxide semiconductor layer. The structure in which the oxide semiconductor layer is contacting with the source and drain electrodes can prevent increasing resistance between the source and the drain comparing one in which an oxide semiconductor layer is electrically connected to source and drain electrodes through an oxide layer.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: May 17, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinpei Matsuda, Masashi Oota, Noritaka Ishihara
  • Patent number: 9293541
    Abstract: A highly reliable semiconductor device including an oxide semiconductor is provided. Provided is a semiconductor device including an oxide semiconductor layer, an insulating layer in contact with the oxide semiconductor layer, a gate electrode layer overlapping with the oxide semiconductor layer, and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The oxide semiconductor layer includes a first region having a crystal whose size is less than or equal to 10 nm and a second region which overlaps with the insulating layer with the first region provided therebetween and which includes a crystal part whose c-axis is aligned in a direction parallel to a normal vector of the surface of the oxide semiconductor layer.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: March 22, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiro Takahashi, Takuya Hirohashi, Masashi Tsubuku, Masashi Oota
  • Patent number: 9281407
    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: March 8, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Yusuke Nonaka, Noritaka Ishihara, Masashi Oota, Hideyuki Kishida
  • Patent number: 9267199
    Abstract: A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: February 23, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Masashi Oota, Yoichi Kurosawa, Noritaka Ishihara
  • Publication number: 20150364610
    Abstract: A semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, a source electrode in contact with the second oxide semiconductor film, a drain electrode in contact with the second oxide semiconductor film, a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the metal oxide film, and a gate electrode over the gate insulating film. The metal oxide film contains M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn. The metal oxide film includes a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when a target has an atomic ratio of M:Zn=x:y.
    Type: Application
    Filed: June 8, 2015
    Publication date: December 17, 2015
    Inventors: Masashi TSUBUKU, Toshihiko TAKEUCHI, Yasumasa YAMANE, Masashi OOTA
  • Publication number: 20150349133
    Abstract: An oxide semiconductor stacked film which does not easily cause a variation in electrical characteristics of a transistor and has high stability is provided. Further, a transistor which includes the oxide semiconductor stacked film in its channel formation region and has stable electrical characteristics is provided. An oxide semiconductor stacked film includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer which are sequentially stacked and each of which contains indium, gallium, and zinc. The content percentage of indium in the second oxide semiconductor layer is higher than that in the first oxide semiconductor layer and the third oxide semiconductor layer, and the absorption coefficient of the oxide semiconductor stacked film, which is measured by the CPM, is lower than or equal to 3×10?3/cm in an energy range of 1.5 eV to 2.3 eV.
    Type: Application
    Filed: July 30, 2015
    Publication date: December 3, 2015
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Ryosuke WATANABE, Masashi OOTA, Noritaka ISHIHARA, Koki INOUE
  • Publication number: 20150329371
    Abstract: The oxide includes indium, an element M, and zinc. The oxide includes a first region and a second region. A peak of diffraction intensity derived from a crystal structure is not observed in the first region using X-ray. An electron diffraction pattern including a third region with high luminance in a ring pattern and a spot in the third region is observed by transmission of an electron beam having a probe diameter of 0.3 nm or more and 3 nm or less through the second region. The oxide includes a crystal part when being observed with a transmission electron microscope.
    Type: Application
    Filed: March 18, 2015
    Publication date: November 19, 2015
    Inventors: Yoichi KUROSAWA, Masashi OOTA, Shunpei YAMAZAKI
  • Publication number: 20150311291
    Abstract: A highly reliable semiconductor device including an oxide semiconductor is provided. Provided is a semiconductor device including an oxide semiconductor layer, an insulating layer in contact with the oxide semiconductor layer, a gate electrode layer overlapping with the oxide semiconductor layer, and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The oxide semiconductor layer includes a first region having a crystal whose size is less than or equal to 10 nm and a second region which overlaps with the insulating layer with the first region provided therebetween and which includes a crystal part whose c-axis is aligned in a direction parallel to a normal vector of the surface of the oxide semiconductor layer.
    Type: Application
    Filed: June 9, 2015
    Publication date: October 29, 2015
    Inventors: Shunpei YAMAZAKI, Masahiro TAKAHASHI, Takuya HIROHASHI, Masashi TSUBUKU, Masashi OOTA