Patents by Inventor Masashi Sugimura

Masashi Sugimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6346432
    Abstract: External connection terminals (25) are disposed on side surfaces, a back surface, or both the side surfaces and the back surface of a semiconductor element, especially an optical element (20) such as an image sensor, a solid state imaging device, etc. The external connection terminals (25) are connected electrically to an integrated circuit (21) of the optical element (20) via wirings (23). The wirings (23) are connected electrically to electrical measuring electrodes (23T) in the course of wafer process, but the electrical measuring electrodes (23T) are disconnected from the wirings (23) after the electrical measurement has been completed. The electrical measuring electrodes (23T) are formed on dicing lines and then removed at the same time when dicing process is executed. The external connection terminals (25) are connected to the wirings (23) from which the electrical measuring electrodes (23T) are disconnected.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: February 12, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masashi Sugimura
  • Publication number: 20010009300
    Abstract: External connection terminals (25) are disposed on side surfaces, a back surface, or both the side surfaces and the back surface of a semiconductor element, especially an optical element (20) such as an image sensor, a solid state imaging device, etc. The external connection terminals (25) are connected electrically to an integrated circuit (21) of the optical element (20) via wirings (23). The wirings (23) are connected electrically to electrical measuring electrodes (23T) in the course of wafer process, but the electrical measuring electrodes (23T) are disconnected from the wirings (23) after the electrical measurement has been completed. The electrical measuring electrodes (23T) are formed on dicing lines and then removed at the same time when dicing process is executed. The external connection terminals (25) are connected to the wirings (23) from which the electrical measuring electrodes (23T) are disconnected.
    Type: Application
    Filed: March 12, 2001
    Publication date: July 26, 2001
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Masashi Sugimura
  • Patent number: 6232655
    Abstract: External connection terminals (25) are disposed on side surfaces, a back surface, or both the side surfaces and the back surface of a semiconductor element, especially an optical element (20) such as an image sensor, a solid state imaging device, etc. The external connection terminals (25) are connected electrically to an integrated circuit (21) of the optical element (20) via wirings (23). The wirings (23) are connected electrically to electrical measuring electrodes (23T) in the course of wafer process, but the electrical measuring electrodes (23T) are disconnected from the wirings (23) after the electrical measurement has been completed. The electrical measuring electrodes (23T) are formed on dicing lines and then removed at the same time when dicing process is executed. The external connection terminals (25) are connected to the wirings (23) from which the electrical measuring electrodes (23T) are disconnected.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: May 15, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masashi Sugimura
  • Patent number: 5335315
    Abstract: A computer type setting device (CTI) performs layout of letters and graphic information of a manuscript on printing plates, based on the data transmitted from a keyboard. During such an operation, plate layout data LD such as the font, size, word spacing and line spacing, are determined. Raster image processor (RIP) converts this plate data PD into digitized bitmaps/characters BD, and inputs the results into a layout scanner. The layout scanner converts the digitized pictorial and figure data into 8-bit contrast image data IM, per page of the manuscript, and determines the layout of the images and the contrast data on the printing plates. The dot generator 13 scans the finished plates data PD in a given direction, digitizes the images in terms of [0]s and [1]s into film exposure data ED, and supplies the results to an output scanner and a memory device. The output scanner optically produces positive film nettings, based on the successive film exposure data ED.
    Type: Grant
    Filed: September 11, 1991
    Date of Patent: August 2, 1994
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Masakichi Yoshida, Kenjiro Ikehata, Masashi Sugimura