Patents by Inventor Masashi Takamura

Masashi Takamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250239387
    Abstract: To provide a manufacturing method for a laminated ceramic component capable of forming an external electrode with a suppressed moon shape. The manufacturing method for the laminated ceramic component includes a first step, a second step, a third step, a fourth step, and a fifth step. In the first step, a laminate that a plurality of ceramic green sheets and a plurality of internal electrode paste layers are laminated is prepared. In the second step, the laminate is fired to form a ceramic element body. In the third step, plasma treatment is performed on a surface of the ceramic element body. In the fourth step, an external electrode paste is attached to a part of the surface of the ceramic element body after the third step. In the fifth step, the ceramic element body after the fourth step is subjected to the heat treatment to form an external electrode.
    Type: Application
    Filed: December 27, 2024
    Publication date: July 24, 2025
    Inventors: YUUICHI ABE, MIKINORI AMISAWA, KAZUHIKO KUBO, YUJI YAMAGISHI, MASASHI TAKAMURA
  • Publication number: 20250087393
    Abstract: A stacked varistor having a small variation in electrostatic capacitance is obtained. The stacked varistor includes first internal electrode projection extending from third internal electrode toward first end surface between first side surface and first varistor region, and second internal electrode projection extending from third internal electrode toward second end surface between first side surface and second varistor region. First internal electrode projection extends closer to first end surface than a line connecting point closest to first end surface of first varistor region and point closest to first end surface of third external electrode is. Second internal electrode projection extends closer to second end surface than a line connecting point closest to second end surface of second varistor region and point closest to second end surface of third external electrode is.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Inventors: Masashi TAKAMURA, Ken YANAI, Sayaka WATANABE, Tomomitsu MURAISHI
  • Patent number: 12224090
    Abstract: A multilayer varistor has a stack structure including a plurality of layers stacked in a third direction. The multilayer varistor includes a first internal electrode electrically connected to a first external electrode, a second internal electrode electrically connected to the second external electrode, and a third internal electrode electrically connected to the third external electrode. The first internal electrode is disposed between the second internal electrode and the third internal electrode in the third direction.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: February 11, 2025
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masashi Takamura, Sayaka Watanabe, Takeshi Fujii, Ken Yanai, Yuto Akiyama
  • Patent number: 12183491
    Abstract: A stacked varistor having a small variation in electrostatic capacitance is obtained. The stacked varistor includes first internal electrode projection extending from third internal electrode toward first end surface between first side surface and first varistor region, and second internal electrode projection extending from third internal electrode toward second end surface between first side surface and second varistor region. First internal electrode projection extends closer to first end surface than a line connecting point closest to first end surface of first varistor region and point closest to first end surface of third external electrode is. Second internal electrode projection extends closer to second end surface than a line connecting point closest to second end surface of second varistor region and point closest to second end surface of third external electrode is.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: December 31, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masashi Takamura, Ken Yanai, Sayaka Watanabe, Tomomitsu Muraishi
  • Patent number: 12106877
    Abstract: It is aimed to provide a laminated varistor capable of reducing stray capacitance to occur between an internal electrode and an external electrode, and also capable of reducing a variation in the stray capacitance due to a variation in the external electrode. A laminated varistor of the present disclosure has external electrodes on first end surface, second end surface, and first side surface of sintered body. No external electrode is provided on second side surface opposite to first side surface. Varistor regions in which internal electrodes overlap each other in a laminating direction are provided at positions closer to second side surface than to first side surface.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: October 1, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Sayaka Matsumoto, Ken Yanai, Masashi Takamura, Masaya Hattori, Tomomitsu Muraishi
  • Publication number: 20240177894
    Abstract: A laminated varistor includes a sintered body and first to third internal electrodes provided inside the sintered body. The first internal electrode includes a first facing part facing the third internal electrode in a third direction, and a first connecting part connecting the first facing part and the first external electrode. The second internal electrode includes a second facing part facing the third internal electrode in the third direction, and a second connecting part connecting the second facing part and the second external electrode. The first connecting part includes a first connection portion connected to the first external electrode, and a first narrow part having a dimension in a second direction smaller than the first connection portion. The second connecting part includes a second connection portion connected to the second external electrode, and a second narrow part having a dimension in the second direction smaller than the second connection portion.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 30, 2024
    Inventors: MASASHI TAKAMURA, KEN YANAI, YUJI YAMAGISHI, SAYAKA WATANABE, YUTO AKIYAMA
  • Publication number: 20240177895
    Abstract: A first internal electrode includes a pair of first connecting parts extending from a first end surface along a first direction to be connected to a first external electrode, and a first facing part provided between the pair of first connecting parts. A second internal electrode includes a pair of second connecting parts extending from a second end surface along the first direction to be connected to a second external electrode, and a second facing part provided between the pair of second connecting parts. A third internal electrode includes a third facing part disposed along the first direction. The third facing part overlaps the first facing part and the second facing part. A first end of the third facing part is disposed between the pair of first connecting parts, and a second end of the third facing part is disposed between the pair of second connecting parts.
    Type: Application
    Filed: November 7, 2023
    Publication date: May 30, 2024
    Inventors: MASASHI TAKAMURA, KEN YANAI, YUJI YAMAGISHI, SAYAKA WATANABE, YUTO AKIYAMA
  • Publication number: 20240105365
    Abstract: An object of the present disclosure is to provide a multilayer varistor with the ability to reduce the chances of causing crosstalk between external terminals. Inside a sintered body having the shape of a rectangular parallelepiped, of which the longitudinal axis is aligned with a first direction, a first facing portion and a second facing portion are provided to interpose a third facing portion between themselves. At least one of a first side surface or a second side surface is provided with a first external electrode connected to the first facing portion, a second external electrode connected to the second facing portion, and a third external electrode and a fourth external electrode connected to the third facing portion. In the first direction, the first external electrode and the second external electrode are interposed between the third external electrode and the fourth external electrode.
    Type: Application
    Filed: February 18, 2022
    Publication date: March 28, 2024
    Inventors: Yuto AKIYAMA, Masashi TAKAMURA, Ken YANAI
  • Publication number: 20230326636
    Abstract: A multilayer varistor includes a sintered body and a first internal electrode, a second internal electrode, a third internal electrode, and a fourth internal electrode which are disposed in the sintered body. The first internal electrode, the second internal electrode, the third internal electrode, and the fourth internal electrode are arranged in an order of the first internal electrode, the third internal electrode, the fourth internal electrode, and the second internal electrode from a side of a first main face. The third internal electrode and the fourth internal electrode are electrically connected to each other. At least part of the first internal electrode and at least part of the third internal electrode overlap each other when viewed in a third direction. At least part of the second internal electrode and at least part of the fourth internal electrode overlap each other when viewed in the third direction.
    Type: Application
    Filed: March 10, 2023
    Publication date: October 12, 2023
    Inventors: Masashi TAKAMURA, Yuto AKIYAMA, Ken YANAI
  • Publication number: 20230274864
    Abstract: A multilayer varistor according to the present disclosure includes: a sintered compact having, on a surface thereof, at least one planar portion and at least one corner portion; an internal electrode provided inside the sintered compact; a high-resistivity layer arranged to cover the at least one planar portion and the at least one corner portion of the sintered compact at least partially; and an external electrode arranged to cover the high-resistivity layer partially and electrically connected to the internal electrode. The high-resistivity layer includes: a first high-resistivity layer covering the at least one planar portion; and a second high-resistivity layer covering the at least one corner portion. The first high-resistivity layer has a larger average thickness than the second high-resistivity layer.
    Type: Application
    Filed: February 23, 2023
    Publication date: August 31, 2023
    Inventors: Yuto AKIYAMA, Ken YANAI, Masashi TAKAMURA, Yuji YAMAGISHI, Ryosuke USUI
  • Publication number: 20230274863
    Abstract: A multilayer varistor according to the present disclosure includes; a sintered compact; an internal electrode provided inside the sintered compact; a high-resistivity layer arranged to cover the sintered compact at least partially; and an external electrode arranged to cover the high-resistivity layer partially and electrically connected to the internal electrode. The high-resistivity layer includes a thinner region having a smaller thickness than a surrounding region that surrounds the thinner region.
    Type: Application
    Filed: February 23, 2023
    Publication date: August 31, 2023
    Inventors: Yuto AKIYAMA, Ken YANAI, Ryosuke USUI, Yuji YAMAGISHI, Masashi TAKAMURA
  • Publication number: 20230134880
    Abstract: It is aimed to provide a laminated varistor capable of reducing stray capacitance to occur between an internal electrode and an external electrode, and also capable of reducing a variation in the stray capacitance due to a variation in the external electrode. A laminated varistor of the present disclosure has external electrodes on first end surface, second end surface, and first side surface of sintered body. No external electrode is provided on second side surface opposite to first side surface. Varistor regions in which internal electrodes overlap each other in a laminating direction are provided at positions closer to second side surface than to first side surface.
    Type: Application
    Filed: September 24, 2020
    Publication date: May 4, 2023
    Inventors: SAYAKA MATSUMOTO, KEN YANAI, MASASHI TAKAMURA, MASAYA HATTORI, TOMOMITSU MURAISHI
  • Publication number: 20230104285
    Abstract: A stacked varistor having a small variation in electrostatic capacitance is obtained. The stacked varistor includes first internal electrode projection extending from third internal electrode toward first end surface between first side surface and first varistor region, and second internal electrode projection extending from third internal electrode toward second end surface between first side surface and second varistor region . First internal electrode projection extends closer to first end surface than a line connecting point closest to first end surface of first varistor region and point closest to first end surface of third external electrode is. Second internal electrode projection extends closer to second end surface than a line connecting point closest to second end surface of second varistor region and point closest to second end surface of third external electrode is.
    Type: Application
    Filed: March 18, 2021
    Publication date: April 6, 2023
    Inventors: MASASHI TAKAMURA, KEN YANAI, SAYAKA WATANABE, TOMOMITSU MURAISHI
  • Publication number: 20230079197
    Abstract: A multilayer varistor has a stack structure including a plurality of layers stacked in a third direction. The multilayer varistor includes a first internal electrode electrically connected to a first external electrode, a second internal electrode electrically connected to the second external electrode, and a third internal electrode electrically connected to the third external electrode. The first internal electrode is disposed between the second internal electrode and the third internal electrode in the third direction.
    Type: Application
    Filed: December 17, 2021
    Publication date: March 16, 2023
    Inventors: Masashi TAKAMURA, Sayaka WATANABE, Takeshi FUJII, Ken YANAI, Yuto AKIYAMA
  • Publication number: 20090303348
    Abstract: According to the invention, search and extraction of images obtained by capturing the same region are enabled to be performed at low load and in an easy manner. A multi-angle information generating apparatus 10 which groups images that are obtained by capturing by plural imaging apparatuses has: sensing metadata acquiring unit 101 which acquires sensor information relating to capturing conditions of the imaging apparatuses 20; focus-plane metadata deriving unit 102 which derives focus planes including the images taken by the imaging apparatuses 20, based on the acquired sensor information; grouping judging unit 103 which groups the images on the basis of positional relationships of the focus planes; and multi-angle metadata recording unit 104 which records results of the grouping as multi-angle information with correlating the information with the images.
    Type: Application
    Filed: May 30, 2006
    Publication date: December 10, 2009
    Inventors: Yasuaki Inatomi, Mitsuhiro Kageyama, Tohru Wakabayashl, Masashi Takamura
  • Patent number: 7385625
    Abstract: A liquid crystal display unit has a transmissive liquid crystal plate having a number of pixels arranged on a two-dimensional basis, on which an image is formed, and a light source unit emitting beams of light of a plurality of luminescent colors for irradiating said liquid crystal plate from back. An interface circuit receives an image signal representative of a color image to sequentially form on said liquid crystal plate a plurality of separation images in which the color image is separated in association with the plurality of luminescent colors of said light source unit. The interface circuit causes said light source unit to flash with a luminescent color associated with a separation image formed on said liquid crystal plate in synchronism with a sequential formation of the separation images onto said liquid crystal plate. Beams of light emanated from the light source unit and transmitted through the liquid crystal plate reproduce an image.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: June 10, 2008
    Assignee: Fujifilm Corporation
    Inventors: Hiroshi Ohmura, Masashi Takamura, Hiroshi Komatsuzaki, Ko Aosaki, Akihiko Funaki, Jin Murayama
  • Publication number: 20040130645
    Abstract: A liquid crystal display unit has a transmissive liquid crystal plate having a number of pixels arranged on a two-dimensional basis, on which an image is formed, and a light source unit emitting beams of light of a plurality of luminescent colors for irradiating said liquid crystal plate from back. An interface circuit receives an image signal representative of a color image to sequentially form on said liquid crystal plate a plurality of separation images in which the color image is separated in association with the plurality of luminescent colors of said light source unit. The interface circuit causes said light source unit to flash with a luminescent color associated with a separation image formed on said liquid crystal plate in synchronism with a sequential formation of the separation images onto said liquid crystal plate. Beams of light emanated from the light source unit and transmitted through the liquid crystal plate reproduce an image.
    Type: Application
    Filed: December 11, 2003
    Publication date: July 8, 2004
    Applicant: FUJI PHOTO FILM CO., LTD.
    Inventors: Hiroshi Ohmura, Masashi Takamura, Hiroshi Komatsuzaki, Ko Aosaki, Akihiko Funaki, Jin Murayama
  • Publication number: 20020001472
    Abstract: A liquid crystal display unit has a transmissive liquid crystal plate having a number of pixels arranged on a two-dimensional basis, on which an image is formed, and a light source unit emitting beams of light of a plurality of luminescent colors for irradiating said liquid crystal plate from back. An interface circuit receives an image signal representative of a color image to sequentially form on said liquid crystal plate a plurality of separation images in which the color image is separated in association with the plurality of luminescent colors of said light source unit. The interface circuit causes said light source unit to flash with a luminescent color associated with a separation image formed on said liquid crystal plate in synchronism with a sequential formation of the separation images onto said liquid crystal plate. Beams of light emanated from the light source unit and transmitted through the liquid crystal plate reproduce an image.
    Type: Application
    Filed: August 7, 2001
    Publication date: January 3, 2002
    Applicant: Fuji Photo Film Co., Ltd.
    Inventors: Hiroshi Ohmura, Masashi Takamura, Hiroshi Komatsuzaki, Ko Aosaki, Akihiko Funaki, Jin Murayama
  • Patent number: 6314248
    Abstract: A liquid crystal display unit has a transmissive liquid crystal plate having a number of pixels arranged on a two-dimensional basis, on which an image is formed, and a light source unit emitting beams of light of a plurality of luminescent colors for irradiating said liquid crystal plate from back. An interface circuit receives an image signal representative of a color image to sequentially form on said liquid crystal plate a plurality of separation images in which the color image is separated in association with the plurality of luminescent colors of said light source unit. The interface circuit causes said light source unit to flash with a luminescent color associated with a separation image formed on said liquid crystal plate in synchronism with a sequential formation of the separation images onto said liquid crystal plate. Beams of light emanated from the light source unit and transmitted through the liquid crystal plate reproduce an image.
    Type: Grant
    Filed: May 5, 1999
    Date of Patent: November 6, 2001
    Assignee: Fuji Photo Film, Co., Ltd.
    Inventors: Hiroshi Ohmura, Masashi Takamura, Hiroshi Komatsuzaki, Ko Aosaki, Akihiko Funaki, Jin Murayama
  • Patent number: 6018632
    Abstract: A zoom ratio adjusting device includes a member movable between a telephoto end position and a wide-angle end position on opposite sides of a neutral position which is provided with a first and a second elastic arm, each arm being deformable while the zoom ratio adjusting member moves toward each of the telephoto end and wide-angle end positions to accumulate reactive force for returning the member to the neutral position and to hold the zoom ratio adjusting member in the neutral position.
    Type: Grant
    Filed: October 9, 1998
    Date of Patent: January 25, 2000
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Masashi Takamura