Abstract: A pixel clock generating device includes a high-frequency clock generator, a comparer, a pixel clock generator, and a value switcher. The high-frequency clock generator is configured to generate a high-frequency clock. The comparer is configured to measure a time interval between a leading-end synchronizing signal and a trailing-end synchronizing signal in a main scanning and calculate an error between the time interval and a target value. The pixel clock generator is configured to generate a pixel clock based on the high-frequency clock and a pixel clock frequency and correct the pixel clock based on the error. The value switcher, including a plurality of groups of values with which the pixel clock is generated, is configured to switch between the plurality of groups of values according to a switching signal after the trailing-end synchronizing signal is inputted, the comparer calculates the error, and the pixel clock generator corrects the pixel clock.

Abstract: A pixel clock generating device includes a high-frequency clock generator, a comparer, a pixel clock generator, and a value switcher. The high-frequency clock generator is configured to generate a high-frequency clock. The comparer is configured to measure a time interval between a leading-end synchronizing signal and a trailing-end synchronizing signal in a main scanning and calculate an error between the time interval and a target value. The pixel clock generator is configured to generate a pixel clock based on the high-frequency clock and a pixel clock frequency and correct the pixel clock based on the error. The value switcher, including a plurality of groups of values with which the pixel clock is generated, is configured to switch between the plurality of groups of values according to a switching signal after the trailing-end synchronizing signal is inputted, the comparer calculates the error, and the pixel clock generator corrects the pixel clock.

Abstract: An optical writing device and an image forming apparatus incorporating the optical writing device. The optical writing device includes two or more light sources, a pixel clock generator to measure a scanning speed of one of the two or more light sources and generate a pixel clock of a cycle corrected according to the measured scanning speed, a pulse data generation and output unit to generate pulse width data and shift data for the pixel clock generated by the pixel clock generator to output the generated pulse width data and the generated shift data for each one of the two or more light sources, and a plurality of image pulse generation and output units to generate an image pulse. In the optical writing device, the plurality of image pulse generation and output units are supplied with the pixel clock in common.

Abstract: An optical writing device and an image forming apparatus incorporating the optical writing device. The optical writing device includes two or more light sources, a pixel clock generator to measure a scanning speed of one of the two or more light sources and generate a pixel clock of a cycle corrected according to the measured scanning speed, a pulse data generation and output unit to generate pulse width data and shift data for the pixel clock generated by the pixel clock generator to output the generated pulse width data and the generated shift data for each one of the two or more light sources, and a plurality of image pulse generation and output units to generate an image pulse. In the optical writing device, the plurality of image pulse generation and output units are supplied with the pixel clock in common.

Abstract: A disclosed motor driver control device is configured to control a plurality of switching devices that drive a motor. The motor driver control device includes a duty control unit configured to restrict a duty of a first pulse width modulation signal generated by comparing an oscillator signal generated at a predetermined cycle and a pulse generator signal so as to generate a second pulse width modulation signal, and a switching device control signal generator unit configured to include a logic circuit that operates the second pulse width modulation signal as a clock and configured to generate a switching device control signal controlling the plurality of switching devices based on the clock of the logic circuit of the switching device control signal generator unit.

Abstract: A communication system includes a master device and slave devices. Each slave device includes a request signal generation part configured to, when data to transmit is generated, generate a request signal indicating a transmission request to a master device; and a transmission part configured to transmit the request signal to the master device. The master device includes a request signal reception part configured to receive the request signals from the slave devices; a selection part acting configured to select one of the slave devices according to the request signals received by the reception part; a transmission part configured to transmit a signal indicating to allow data transmission to the slave device selected by the selection part; and a data reception part configured to receive data from the selected slave device.

Abstract: A dead-time generating circuit includes a constant current circuit; a current generating circuit generating a capacitor-charge current; and a control circuit receiving a dead time control signal and a comparator signal. The control circuit generates a dead time generating signal based on the dead time control signal and the comparator signal, and a charge/discharge signal based on the dead time generating signal. Charging or discharging of a capacitor is controlled by the capacitor-charge current in accordance with the charge/discharge signal. A voltage of the capacitor is compared with a threshold voltage in order to generate a comparator signal when the voltage of the capacitor exceeds the threshold voltage. The control circuit generates the charge/discharge signal for a duration starting from a time when the delay time has elapsed from the rise or fall timing of the dead time control signal until the control circuit receives the comparator signal.

Abstract: A dead-time generating circuit includes a constant current circuit; a current generating circuit generating a capacitor-charge current; and a control circuit receiving a dead time control signal and a comparator signal. The control circuit generates a dead time generating signal based on the dead time control signal and the comparator signal, and a charge/discharge signal based on the dead time generating signal. Charging or discharging of a capacitor is controlled by the capacitor-charge current in accordance with the charge/discharge signal. A voltage of the capacitor is compared with a threshold voltage in order to generate a comparator signal when the voltage of the capacitor exceeds the threshold voltage. The control circuit generates the charge/discharge signal for a duration starting from a time when the delay time has elapsed from the rise or fall timing of the dead time control signal until the control circuit receives the comparator signal.

Abstract: A communication system includes a master device and slave devices. Each slave device includes a request signal generation part configured to, when data to transmit is generated, generate a request signal indicating a transmission request to a master device; and a transmission part configured to transmit the request signal to the master device. The master device includes a request signal reception part configured to receive the request signals from the slave devices; a selection part acting configured to select one of the slave devices according to the request signals received by the reception part; a transmission part configured to transmit a signal indicating to allow data transmission to the slave device selected by the selection part; and a data reception part configured to receive data from the selected slave device.

Abstract: A disclosed motor driver control device is configured to control a plurality of switching devices that drive a motor. The motor driver control device includes a duty control unit configured to restrict a duty of a first pulse width modulation signal generated by comparing an oscillator signal generated at a predetermined cycle and a pulse generator signal so as to generate a second pulse width modulation signal, and a switching device control signal generator unit configured to include a logic circuit that operates the second pulse width modulation signal as a clock and configured to generate a switching device control signal controlling the plurality of switching devices based on the clock of the logic circuit of the switching device control signal generator unit.

Abstract: A MODEM device includes a detector configured to detect a synchronization signal transmitted from a source MODEM in a resynchronization process of a primary channel and a timer configured to count up starting from a beginning of a detection of the synchronization signal, and send information to forcibly move into a receiving mode for receiving image data when a time period from the beginning to a completion of the detection of the synchronization signal exceeds a predetermined time period.

Abstract: A facsimile use modem apparatus includes an analog interface formed from a silicon data access arrangement interfacing with an analog telephone line. A digital interface is provided to interface with an ISDN line. A signal converting device is provided to convert a modem signal used in facsimile communications via the analog telephone line into a signal used in the ISDN line, vice a versa. A data transmitting device is provided to transmit linear data to a monitor via the silicon data access arrangement when G3 facsimile communications are performed via the ISDN line so as to monitor a progress of the G3 facsimile communications.

Abstract: This patent specification describes a MODEM device which includes a detector configured to detect a synchronization signal transmitted from a source MODEM in a resynchronization process of a primary channel and a timer configured to count up starting from a beginning of a detection of the synchronization signal, and send information to forcibly move into a receiving mode for receiving image data when a time period from the beginning to a completion of the detection of the synchronization signal exceeds a predetermined time period.

Abstract: A facsimile use modem apparatus includes an analog interface formed from a silicon data access arrangement interfacing with an analog telephone line. A digital interface is provided to interface with an ISDN line. A signal converting device is provided to convert a modem signal used in facsimile communications via the analog telephone line into a signal used in the ISDN line, vice a versa. A data transmitting device is provided to transmit linear data to a monitor via the silicon data access arrangement when G3 facsimile communications are performed via the ISDN line so as to monitor a progress of the G3 facsimile communications.

Abstract: In S2, to-be-compressed image data is encoded and thus compressed each time when using a respective one of a plurality of templates. In S4, compression rates of encoded data are compared with each other which encoded data was encoded each time when a respective one of the plurality of templates was used in S2. In S6, encoded data having the highest compression rate and template identification information of a template used when the encoded data having the highest compression rate was obtained in S2 are output. The encoding comprises entropy encoding. The to-be-compressed data comprises video game software programs.