Patents by Inventor Masashi Yoshimi
Masashi Yoshimi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20060043517Abstract: In a stacked-layer type photoelectric conversion device, a plurality of photoelectric conversion units are stacked on a substrate, each of which includes a one conductivity-type layer, a photoelectric conversion layer of substantially intrinsic semiconductor and an opposite conductivity-type layer in this order from a light-incident side. At least one of the opposite conductivity-type layer in a front photoelectric conversion unit arranged relatively closer to the light-incident side and the one conductivity-type layer in a back photoelectric conversion unit arranged adjacent to the front photoelectric conversion unit includes a silicon composite layer at least in a part thereof. The silicon composite layer has a thickness of more than 20 nm and less than 130 nm and an oxygen concentration of more than 25 atomic % and less than 60 atomic %, and includes silicon-rich phase parts in an amorphous alloy phase of silicon and oxygen.Type: ApplicationFiled: July 15, 2004Publication date: March 2, 2006Inventors: Toshiaki Sasaki, Yohei Koi, Kenji Yamamoto, Masashi Yoshimi, Mitsuru Ichikawa
-
Publication number: 20050181534Abstract: A method of manufacturing a tandem-type thin film photoelectric conversion device includes the steps of forming at least one photoelectric conversion unit (3) on a substrate (1) in a deposition apparatus, taking out the substrate (1) having the photoelectric conversion unit (3) from the deposition apparatus to the air, introducing the substrate (1) into a deposition apparatus and carrying out plasma exposure processing on the substrate (1) in an atmosphere of a gas mixture containing an impurity for determining the conductivity type of the same conductivity type as that of the uppermost conductivity type layer (33) and hydrogen, forming a conductivity type intermediate layer (5) by additionally supplying semiconductor raw gas to the deposition apparatus, and then forming a subsequent photoelectric conversion unit (4).Type: ApplicationFiled: April 2, 2003Publication date: August 18, 2005Inventors: Masashi Yoshimi, Takashi Suezaki, Kenji Yamamoto
-
Patent number: 6880381Abstract: A knock detection device that can not only detect knock accurately, but can also detect heavy knock quickly. Cylinder pressure is detected by a pressure sensor installed in each cylinder in an internal combustion engine. AS the occurrence or non-occurrence of heavy knock is determined based on the ratio between the maximum value of cylinder pressure fluctuation and the maximum value of cylinder pressure divided by a prescribed value, it becomes possible to detect the occurrence of heavy knock quickly. If it is determined that heavy knock has occurred, a knock suppression measure involving, for example, reducing the spark advance angle, is immediately applied, thus preventing damage to the internal combustion engine.Type: GrantFiled: November 10, 2003Date of Patent: April 19, 2005Assignee: Fujitsu Ten LimitedInventors: Koji Fukuoka, Kenji Kasashima, Yuji Miyanoo, Masashi Yoshimi
-
Patent number: 6820591Abstract: An upper limit guard is set for a valve overlap amount according to a KCS learning value used to retard-correct an ignition timing in order to suppress knock, and an engine load. As a result, it is possible to make the upper limit guard value a value able to restrict the valve overlap amount to a value equal to, or less than, a value at which an internal EGR amount does not become excessive during a retard-correction of the ignition timing. By applying the upper limit guard to the valve overlap amount using the upper limit guard value, it is possible to suppress the valve overlap amount from increasing from the optimum value following a retard-correction of the ignition timing, as well as suppress the value of overlap amount from being reduced when it is not deviating from the optimum value and is below the upper limit guard value.Type: GrantFiled: January 12, 2004Date of Patent: November 23, 2004Assignee: Toyota Jidosha Kabushiki KaishaInventors: Katsutoshi Tanei, Hirohisa Kishi, Isao Takagi, Rihito Kaneko, Masashi Yoshimi
-
Publication number: 20040149263Abstract: An upper limit guard is set for a valve overlap amount according to a KCS learning value used to retard-correct an ignition timing in order to suppress knock, and an engine load. As a result, it is possible to make the upper limit guard value a value able to restrict the valve overlap amount to a value equal to, or less than, a value at which an internal EGR amount does not become exvessive during a retard-correction of the ignition timing. By applying the upper limit guard to the valve overlap amount using the upper limit guard value, it is possible to suppress the valve overlap amount from increasing from the optimum value following a retard-correction of the ignition timing, as well as suppress the value of overlap amount from being reduced when it is not deviating from the optimum value and is below the upper limit guard value.Type: ApplicationFiled: January 12, 2004Publication date: August 5, 2004Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Katsutoshi Tanei, Hirohisa Kishi, Isao Takagi, Rihito Kaneko, Masashi Yoshimi
-
Publication number: 20040103714Abstract: A knock detection device that can not only detect knock accurately, but can also detect heavy knock quickly. Cylinder pressure is detected by a pressure sensor installed in each cylinder in an internal combustion engine. AS the occurrence or non-occurrence of heavy knock is determined based on the ratio between the maximum value of cylinder pressure fluctuation and the maximum value of cylinder pressure divided by a prescribed value, it becomes possible to detect the occurrence of heavy knock quickly. If it is determined that heavy knock has occurred, a knock suppression measure involving, for example, reducing the spark advance angle, is immediately applied, thus preventing damage to the internal combustion engine.Type: ApplicationFiled: November 10, 2003Publication date: June 3, 2004Inventors: Koji Fukuoka, Kenji Kasashima, Yuji Miyanoo, Masashi Yoshimi
-
Patent number: 6617010Abstract: A semiconductor thin film which is deposited by using a chemical vapor deposition method at an underlying layer temperature of 400° C. or less, and contains, as main component elements, a Group IV atom and hydrogen atom. A temperature dependency of an amount of release of hydrogen atoms within the film when the film is heated from room temperature exhibits a profile having a peak of the hydrogen releasing amount at 370° C. or higher and 410° C. or less, and a half-value width of the peak is 30° C. or less.Type: GrantFiled: January 18, 2001Date of Patent: September 9, 2003Assignee: Kaneka CorporationInventors: Masashi Yoshimi, Takafumi Fujihara
-
Patent number: 6566159Abstract: A method of manufacturing a tandem thin-film solar cell is provided, the solar cell including a plurality of photoelectric conversion units stacked on a substrate, the photoelectric conversion units each having a p-type layer, an i-type photoelectric conversion layer and an n-type layer deposited in this order from a light-incident side of the solar cell, and at least a rear unit among the photoelectric conversion units that is furthest from the light-incident side being a crystalline unit including a crystalline i-type photoelectric conversion layer. The manufacturing method includes the steps of forming at least one of the units on the substrate by plasma CVD and immediately thereafter forming an i-type boundary layer to a thickness of at most 5 nm by plasma CVD, and thereafter removing the substrate into the atmosphere to expose a surface of the i-type boundary layer to the atmosphere and then forming a crystalline unit on the i-type boundary layer by plasma CVD.Type: GrantFiled: October 2, 2001Date of Patent: May 20, 2003Assignee: Kaneka CorporationInventors: Toru Sawada, Masashi Yoshimi
-
Publication number: 20020059726Abstract: A method of manufacturing a tandem thin-film solar cell is provided, the solar cell including a plurality of photoelectric conversion units stacked on a substrate, the photoelectric conversion units each having a p-type layer, an i-type photoelectric conversion layer and an n-type layer deposited in this order from a light-incident side of the solar cell, and at least a rear unit among the photoelectric conversion units that is furthest from the light-incident side being a crystalline unit including a crystalline i-type photoelectric conversion layer. The manufacturing method includes the steps of forming at least one of the units on the substrate by plasma CVD and immediately thereafter forming an i-type boundary layer to a thickness of at most 5 nm by plasma CVD, and thereafter removing the substrate into the atmosphere to expose a surface of the i-type boundary layer to the atmosphere and then forming a crystalline unit on the i-type boundary layer by plasma CVD.Type: ApplicationFiled: October 2, 2001Publication date: May 23, 2002Applicant: KANEKA CORPORATIONInventors: Toru Sawada, Masashi Yoshimi
-
Patent number: 6388301Abstract: A silicon-based thin film photoelectric conversion device includes a substrate 1, a back electrode 10 having a light reflecting metal film 102, at least one silicon-based photoelectric conversion unit 11 and a front transparent electrode 2, wherein at least one of the light reflecting metal film 102 and the front transparent electrode 2 has that surface thereof closer to the silicon-based photoelectric conversion unit provided with convexities and concavities having a level difference therebetween in a range of 0.01 to 2 &mgr;m and a pitch greater than the level difference and no more than 25 times the level difference.Type: GrantFiled: July 11, 2000Date of Patent: May 14, 2002Assignee: Kaneka CorporationInventors: Yuko Tawada, Akihiko Nakajima, Masashi Yoshimi
-
Patent number: 6337224Abstract: In a method of manufacturing a silicon-based thin film photoelectric converter, a crystalline photoelectric conversion layer included in the photoelectric converter is deposited by plasma CVD under the following conditions: the temperature of the underlying film is at most 550° C.; a gas introduced into a plasma reaction chamber has a silane-based gas and a hydrogen gas where the flow rate of the hydrogen gas relative to the silane-based gas is at least 50 times; the pressure in the plasma reaction chamber is set to 3 Torr; and the deposition speed is 17 nm/min in the thickness-wise direction.Type: GrantFiled: May 10, 2000Date of Patent: January 8, 2002Assignee: Kaneka CorporationInventors: Yoshifumi Okamoto, Masashi Yoshimi, Kenji Yamamoto
-
Patent number: 6326304Abstract: At least one of a p type semiconductor layer, an i type amorphous silicon-based photoelectric conversion layer, and an n type semiconductor layer that compose an amorphous silicon-based thin film photoelectric conversion device is deposited under the following conditions. Silane-type gas as a main component of raw material gas which is supplied into a reaction chamber and dilution gas containing hydrogen are used, the flow rate of the dilution gas is four or less times that of the silane-type gas, the partial pressure of the silane-type gas in the plasma CVD reaction chamber ranges from 1.2 Torr to 5.0 Torr, and the distance between a surface of a substrate mounted on an anode electrode and a surface of a cathode electrode ranges from 8 mm to 15 mm.Type: GrantFiled: September 3, 1999Date of Patent: December 4, 2001Assignee: Kaneka CorporationInventors: Masashi Yoshimi, Kenji Yamamoto
-
Patent number: 6297443Abstract: A thin film photoelectric converter includes a polycrystalline photoelectric conversion layer (4) and a metal thin film (3) covering one main surface of the polycrystalline photoelectric layer. Polycrystalline photoelectric conversion layer (4) has an average thickness in the range from 0.5 to 20 &mgr;m and at least one of main surfaces of polycrystalline photoelectric conversion layer (4) has a textured surface structure. The textured structure has fine unevenness with level differences smaller than half of the thickness of polycrystalline photoelectric conversion layer (4) and substantially in the range from 0.05 to 3 &mgr;m.Type: GrantFiled: March 26, 1999Date of Patent: October 2, 2001Assignee: Kaneka CorporationInventors: Akihiko Nakajima, Masashi Yoshimi, Takayuki Suzuki, Kenji Yamamoto
-
Publication number: 20010011748Abstract: A semiconductor thin film which is deposited by using a chemical vapor deposition method at an underlying layer temperature of 400° C. or less, and contains, as main component elements, a Group IV atom and hydrogen atom. A temperature dependency of an amount of release of hydrogen atoms within the film when the film is heated from room temperature exhibits a profile having a peak of the hydrogen releasing amount at 370° C. or higher and 410° C. or less, and a half-value width of the peak is 30° C. or less. Also disclosed is a thin film device having a semiconductor unit portion including this semiconductor thin film, and an electrode portion including an electrically conductive thin film, wherein these portions are formed on the same substrate.Type: ApplicationFiled: January 18, 2001Publication date: August 9, 2001Applicant: KANEKA CORPORATIONInventors: Masashi Yoshimi, Takafumi Fujihara
-
Patent number: 6265288Abstract: A method of fabricating a silicon-based thin-film photoelectric conversion device, where a plasma CVD process is used to deposit a polycrystalline photoelectric conversion layer. During the deposition of the photoelectric conversion layer, the temperature of the underlying layer is less than 550° C., the pressure in the plasma chamber is more than 5 Torr, and the ratio of the flow rates of a hydrogen gas and a silane-type gas is more than 50. In addition, one of the following operations is carried out during the deposition to change the relevant parameters between the start and end of the deposition. First, the distance between the plasma discharge electrodes is increased gradually or in steps. Second, the pressure of the reaction chamber is increased gradually or in steps. Third, the flow rate of the silane-type gas is increased gradually. Fourth, the plasma discharge power density is reduced gradually or in steps.Type: GrantFiled: September 3, 1999Date of Patent: July 24, 2001Assignee: Kaneka CorporationInventors: Yoshifumi Okamoto, Masashi Yoshimi
-
Patent number: 6200825Abstract: A p type semiconductor layer, an i type crystalline (polycrystalline, microcrystalline) photoelectric conversion layer, and an n type semiconductor layer are successively formed in the same plasma CVD deposition chamber. The p type semiconductor layer is produced on condition that the pressure in the deposition chamber is at least 5 Torr. Accordingly, a silicon-based thin film photoelectric conversion device having the p type semiconductor layer, the i type crystalline photoelectric conversion layer, and the n type semiconductor layer stacked on each other is manufactured. A method of manufacturing a silicon-based thin film photoelectric conversion device is thus implemented to produce a photoelectric conversion device having a superior performance and quality by a simple apparatus at a low cost and with high productivity.Type: GrantFiled: September 3, 1999Date of Patent: March 13, 2001Assignee: Kaneka CorporationInventors: Masashi Yoshimi, Yoshifumi Okamoto, Kenji Yamamoto
-
Patent number: 6190932Abstract: A p type semiconductor layer, an i type amorphous photoelectric conversion layer and an n type semiconductor layer of an amorphous type photoelectric conversion unit are formed in separate deposition chambers, respectively. A p type semiconductor layer, an i type crystalline photoelectric conversion layer and an n type semiconductor layer of crystalline type photoelectric conversion unit are formed continuously in one deposition chamber. Accordingly, a method of manufacturing a tandem type thin film photoelectric conversion device is obtained by which a tandem type thin film photoelectric conversion device having superior performance and high quality can be formed by a simple apparatus at a low cost with superior productivity.Type: GrantFiled: September 3, 1999Date of Patent: February 20, 2001Assignee: Kaneka CorporationInventors: Masashi Yoshimi, Yoshifumi Okamoto
-
Patent number: 6187150Abstract: A method for manufacturing a thin film photovoltaic device comprising a transparent conductive film, a thin film photovoltaic unit, and a back transparent conductive film and a back metal electrode which are successively formed on a substrate, wherein the back transparent conductive film is formed by sputtering comprising steps of forming an initial back transparent conductive film under a pressure of 5×10−2 Torr or more for 1 to 30 seconds in the initial stage and forming a main back transparent conductive film having the remainder thickness under a pressure reduced to {fraction (1/10)} the initial pressure or less.Type: GrantFiled: October 7, 1999Date of Patent: February 13, 2001Assignee: Kaneka CorporationInventors: Masashi Yoshimi, Kenji Yamamoto