Patents by Inventor Masashii Wada

Masashii Wada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Nonvolatile semiconductor memory device
    Patent number: 6888751
    Abstract: A nonvolatile semiconductor memory device includes a memory array which comprises a plurality of memory cells of a type wherein predetermined voltages are applied to selected memory cells to change their threshold voltages, whereby information are stored therein according to the difference between the threshold voltages, and whose some memory cells are used as spare memory cells. The nonvolatile semiconductor memory device is provided with a latch circuit connected to each bit line of the memory array through a transmission switch. The memory array is capable of storing therein at least substitutional information for replacing a defective bit by the spare memory cell. The substitutional information is transferred from the memory array to the latch circuit through the transmission switch and held in the latch circuit.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: May 3, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Kiichi Makuta, Akihiro Fujita, Hideo Kasai, Masashii Wada, Atsushi Toukairin
  • Nonvolatile semiconductor memory device
    Patent number: 6556479
    Abstract: A nonvolatile semiconductor memory device includes a memory array which comprises a plurality of memory cells of a type wherein predetermined voltages are applied to selected memory cells to change their threshold voltages, whereby information are stored therein according to the difference between the threshold voltages, and whose some memory cells are used as spare memory cells. The nonvolatile semiconductor memory device is provided with a latch circuit connected to each bit line of the memory array through a transmission switch. The memory array is capable of storing therein at least substitutional information for replacing a defective bit by the spare memory cell. The substitutional information is transferred from the memory array to the latch circuit through the transmission switch and held in the latch circuit.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: April 29, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kiichi Makuta, Akihiro Fujita, Hideo Kasai, Masashii Wada, Atsushi Toukairin
  • Nonvolatile semiconductor memory device
    Patent number: 6480415
    Abstract: A nonvolatile semiconductor memory device includes a memory array which comprises a plurality of memory cells of a type wherein predetermined voltages are applied to selected memory cells to change their threshold voltages, whereby information are stored therein according to the difference between the threshold voltages, and whose some memory cells are used as spare memory cells. The nonvolatile semiconductor memory device is provided with a latch circuit connected to each bit line of the memory array through a transmission switch. The memory array is capable of storing therein at least substitutional information for replacing a defective bit by the spare memory cell. The substitutional information is transferred from the memory array to the latch circuit through the transmission switch and held in the latch circuit.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: November 12, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Kiichi Makuta, Akihiro Fujita, Hideo Kasai, Masashii Wada, Atsushi Toukairin