Abstract: A semiconductor device which includes a first semiconductor chip 10, a first electrode 12 formed on the first semiconductor chip 10, a second semiconductor chip 20 to which the first semiconductor chip 10 is mounted, a second electrode 22 with a protrusion 24, which is formed on the second semiconductor chip 20, and a solder bump 14 which bonds the first electrode 12 and the second electrode 22 to cover at least a part of a side surface of the protrusion 24, and a method for manufacturing thereof are provided.

Abstract: Methods and structures for stack type semiconductor packaging are disclosed. In one embodiment, a semiconductor device includes a semiconductor chip mounted onto a substrate, a first resin molding portion formed on the substrate for sealing the semiconductor chip, and a through metal mounted on the substrate so as to pierce the first resin molding portion around the semiconductor chip. The semiconductor device further comprises an upper metal electrically coupled with the through metal and mounted on the first resin molding portion to extend from the through metal toward the semiconductor chip along an upper surface of the first resin molding portion, where the through metal and the upper metal are formed into an integral structure.

Abstract: The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.

Abstract: A semiconductor device which includes a first semiconductor chip 10, a first electrode 12 formed on the first semiconductor chip 10, a second semiconductor chip 20 to which the first semiconductor chip 10 is mounted, a second electrode 22 with a protrusion 24, which is formed on the second semiconductor chip 20, and a solder bump 14 which bonds the first electrode 12 and the second electrode 22 to cover at least a part of a side surface of the protrusion 24, and a method for manufacturing thereof are provided.

Abstract: A semiconductor device which includes a first semiconductor chip 10, a first electrode 12 formed on the first semiconductor chip 10, a second semiconductor chip 20 to which the first semiconductor chip 10 is mounted, a second electrode 22 with a protrusion 24, which is formed on the second semiconductor chip 20, and a solder bump 14 which bonds the first electrode 12 and the second electrode 22 to cover at least a part of a side surface of the protrusion 24, and a method for manufacturing thereof are provided.

Abstract: A method in accordance with an embodiment of the invention can include forming fan-out wirings on an insulating layer formed on a wafer. Additionally, electrodes of a plurality of semiconductor chips stacked on the fan-out wirings can be electrically coupled with the fan-out wirings. The wafer can be removed.

Abstract: A semiconductor device 100 includes a semiconductor substrate 14, a connection electrode 12 disposed on an upper surface of the semiconductor substrate 14 and connected to an integrated circuit thereon, a through electrode 20 which penetrates the semiconductor substrate 14 and the connection electrode 20, and an insulation portion 30 interposed between the semiconductor substrate 14 and the through electrode 20. The through electrode 20 is integrally formed to protrude outward from upper surfaces of the semiconductor substrate 14 and the connection electrode 12, and connected to the connection electrode 12 in a region where the through electrode 20 penetrates the connection electrode 12.

Abstract: The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.

Abstract: The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.

Abstract: A semiconductor device 100 includes a semiconductor substrate 14, a connection electrode 12 disposed on an upper surface of the semiconductor substrate 14 and connected to an integrated circuit thereon, a through electrode 20 which penetrates the semiconductor substrate 14 and the connection electrode 20, and an insulation portion 30 interposed between the semiconductor substrate 14 and the through electrode 20. The through electrode 20 is integrally formed to protrude outward from upper surfaces of the semiconductor substrate 14 and the connection electrode 12, and connected to the connection electrode 12 in a region where the through electrode 20 penetrates the connection electrode 12.

Abstract: A semiconductor device 100 includes a semiconductor substrate 14, a connection electrode 12 disposed on an upper surface of the semiconductor substrate 14 and connected to an integrated circuit thereon, a through electrode 20 which penetrates the semiconductor substrate 14 and the connection electrode 20, and an insulation portion 30 interposed between the semiconductor substrate 14 and the through electrode 20. The through electrode 20 is integrally formed to protrude outward from upper surfaces of the semiconductor substrate 14 and the connection electrode 12, and connected to the connection electrode 12 in a region where the through electrode 20 penetrates the connection electrode 12.

Abstract: A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.

Abstract: A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.

Abstract: The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.

Abstract: A semiconductor device which includes a first semiconductor chip 10, a first electrode 12 formed on the first semiconductor chip 10, a second semiconductor chip 20 to which the first semiconductor chip 10 is mounted, a second electrode 22 with a protrusion 24, which is formed on the second semiconductor chip 20, and a solder bump 14 which bonds the first electrode 12 and the second electrode 22 to cover at least a part of a side surface of the protrusion 24, and a method for manufacturing thereof are provided.

Abstract: The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.

Abstract: A method in accordance with an embodiment of the invention can include forming fan-out wirings on an insulating layer formed on a wafer. Additionally, electrodes of a plurality of semiconductor chips stacked on the fan-out wirings can be electrically coupled with the fan-out wirings. The wafer can be removed.

Abstract: Methods and structures for stack type semiconductor packaging are disclosed. In one embodiment, a semiconductor device includes a semiconductor chip mounted onto a substrate, a first resin molding portion formed on the substrate for sealing the semiconductor chip, and a through metal mounted on the substrate so as to pierce the first resin molding portion around the semiconductor chip. The semiconductor device further comprises an upper metal electrically coupled with the through metal and mounted on the first resin molding portion to extend from the through metal toward the semiconductor chip along an upper surface of the first resin molding portion, where the through metal and the upper metal are formed into an integral structure.

Abstract: A semiconductor device 100 includes a semiconductor substrate 14, a connection electrode 12 disposed on an upper surface of the semiconductor substrate 14 and connected to an integrated circuit thereon, a through electrode 20 which penetrates the semiconductor substrate 14 and the connection electrode 20, and an insulation portion 30 interposed between the semiconductor substrate 14 and the through electrode 20. The through electrode 20 is integrally formed to protrude outward from upper surfaces of the semiconductor substrate 14 and the connection electrode 12, and connected to the connection electrode 12 in a region where the through electrode 20 penetrates the connection electrode 12.

Abstract: A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.