Abstract: A silicon wafer is provided in which a dopant is phosphorus, resistivity is from 0.5 m?·cm to 1.2 m?·cm, and carbon concentration is 3.0×1016 atoms/cm3 or more. The carbon concentration is decreased by 10% or more near a surface of the silicon wafer compared with a center-depth of the silicon wafer.

Abstract: Provided is a method of producing a high resistance n-type silicon single crystal ingot with small tolerance margin on resistivity in the crystal growth direction, which is suitably used in a power device. In the method of producing a silicon single crystal ingot using Sb or As as an n-type dopant, while a silicon single crystal ingot is pulled up, the amount of the n-type dopant being evaporated from a silicon melt per unit solidification ratio is kept within a target evaporation amount range per unit solidification ratio by controlling one or more pulling condition values including at least one of the pressure in a chamber, the flow volume of Ar gas, and a gap between a guide portion and the silicon melt.

Abstract: Provided are a method of producing a high resistance n-type silicon single crystal ingot with small tolerance margin on specific resistance in the crystal growth direction, which is suitably used in a power device, and a silicon single crystal growth apparatus. In a method of producing a silicon single crystal ingot using Sb or As as an n-type dopant with the use of a silicon single crystal growth apparatus using the Czochralski process, a measurement step of measuring the gas concentration of a compound gas containing the n-type dopant as a constituent element; and a pulling condition controlling step of controlling one or more pulling condition values including at least one of a pressure in the chamber, a flow volume of the Ar gas, and a gap between the guide portion and the silicon melt so that the measured gas concentration falls within a target gas concentration range are performed.

Abstract: Provided is a method of producing a high resistance n-type silicon single crystal ingot with small tolerance margin on resistivity in the crystal growth direction, which is suitably used in a power device. In the method of producing a silicon single crystal ingot using Sb or As as an n-type dopant, while a silicon single crystal ingot is pulled up, the amount of the n-type dopant being evaporated from a silicon melt per unit solidification ratio is kept within a target evaporation amount range per unit solidification ratio by controlling one or more pulling condition values including at least one of the pressure in a chamber, the flow volume of Ar gas, and a gap between a guide portion and the silicon melt.

Abstract: A method for manufacturing a silicon wafer includes a step of annealing a silicon wafer which is sliced from a silicon single crystal ingot, thereby forming a DZ layer in a first surface and in a second surface of the silicon wafer and a step of removing either a portion of the DZ layer in the first surface or a portion of the DZ layer in the second surface.

Abstract: In this silicon single crystal wafer for IGBT, COP defects and dislocation clusters are eliminated from the entire region in the radial direction of the crystal, the interstitial oxygen concentration is 8.5×1017 atoms/cm3 or less, and variation in resistivity within the wafer surface is 5% or less. This method for manufacturing a silicon single crystal wafer for IGBT includes introducing a hydrogen atom-containing substance into an atmospheric gas at a hydrogen gas equivalent partial pressure of 40 to 400 Pa, and growing a single crystal having an interstitial oxygen concentration of 8.5×1017 atoms/cm3 or less at a silicon single crystal pulling speed enabling pulling of a silicon single crystal free of grown-in defects. The pulled silicon single crystal is irradiated with neutrons so as to dope with phosphorous; or an n-type dopant is added to the silicon melt; or phosphorous is added to the silicon melt so that the phosphorous concentration in the silicon single crystal is 2.9×1013 to 2.

Abstract: A silicon wafer is produced through the steps of forming a silicon ingot by a CZ method with an interstitial oxygen concentration of not more than 7.0×1017 atoms/cm3 and with a diameter of a COP occurring region not more than a diameter of a crystal, slicing a wafer from the silicon ingot after doping the silicon ingot with phosphorus, forming a polysilicon layer or a strained layer on one main surface of the wafer, and mirror polishing the other main surface of the wafer.

Abstract: A method of evaluating a silicon wafer includes obtaining first surface distribution information indicating an surface distribution of photoluminescence intensity on a surface of a silicon wafer; after obtaining the first surface distribution information, subjecting the silicon wafer to a thermal oxidation treatment, and then obtaining second surface distribution information indicating an surface distribution of photoluminescence intensity on the surface of the silicon wafer; obtaining difference information for the first surface distribution information and third surface distribution information, with the third surface distribution information having been obtained by correcting the second surface distribution information with a correction coefficient of less than 1; and based on the difference information obtained, evaluating an evaluation item selected from the group consisting of absence or presence of oxygen precipitates and surface distribution of oxygen precipitates in the silicon wafer being evaluated.

Abstract: A method of evaluating a silicon wafer includes obtaining first surface distribution information indicating an surface distribution of photoluminescence intensity on a surface of a silicon wafer; after obtaining the first surface distribution information, subjecting the silicon wafer to a thermal oxidation treatment, and then obtaining second surface distribution information indicating an surface distribution of photoluminescence intensity on the surface of the silicon wafer; obtaining difference information for the first surface distribution information and third surface distribution information, with the third surface distribution information having been obtained by correcting the second surface distribution information with a correction coefficient of less than 1; and based on the difference information obtained, evaluating an evaluation item selected from the group consisting of absence or presence of oxygen precipitates and surface distribution of oxygen precipitates in the silicon wafer being evaluated.

Abstract: Disclosed are high resistivity silicon wafers, wherein the interstitial oxygen concentration thereof is 8×1017 atoms/cm3 (ASTM F121-1979) or less, BMD (Bulk Micro Defect) density—oxygen precipitate within wafer—is 5×107 pieces/cm3 or less, and an electric resistivity thereof is 100 ?·cm or more. And further disclosed are high resistivity silicon wafers having an electric resistivity of 100 ?·cm or more, which are cut from crystal region where no COP (Crystal Originated Particle) exist, and in which neither COP (Crystal Originated Particle) nor oxygen precipitate exist at the area from wafer surface to the depth of 5 ?m or more owing to high temperature treatment. It is preferable that, in said high resistivity wafers, carbon concentration in wafers is 1×1016 atoms/cm3 or more (ASTM F123-1981), and/or nitrogen concentration is 1×1013 atoms/cm3 or more.

Abstract: To provide a method of removing a heavy metal contained in a thinned semiconductor substrate. A method of removing a heavy metal in a semiconductor substrate of the present invention comprises: attaching, to a rear surface of the semiconductor substrate, a material that lowers a potential barrier of the rear surface of the semiconductor substrate, on a front surface of which a circuit is to be formed or is formed; applying a thermal treatment to the semiconductor substrate under a condition based on a thickness and a resistivity of the semiconductor substrate; and, depositing the heavy metal in the semiconductor substrate on the rear surface.

Abstract: There is provided a quantitative evaluation device or the like of atomic vacancy existing in a silicon wafer in which the atomic vacancy concentration in the silicon wafer can be quantitatively evaluated by forming a rationalized thin-film transducer on a surface of a silicon sample without conducting an acceleration treatment for enhancing the concentration.

Abstract: A method for preparing a silicon epitaxial wafer that includes a silicon single crystal wafer sliced from a CZ silicon ingot doped with carbon in a concentration range of not less than 5×1015 atoms/cm3 and not more than 5×1017 atoms/cm3 and an epitaxial layer consisting of a silicon single crystal epitaxially grown on a front surface of the silicon single crystal wafer. A polycrystalline silicon layer having a thickness of not less than 0.5 ?m and not more than 1.5 ?m is formed on a back surface of the silicon single crystal wafer.

Abstract: A silicon wafer which achieves a gettering effect without occurrence of slip dislocations is provided, and the silicon wafer is subject to heat treatment after slicing from a silicon monocrystal ingot so that a layer which has zero light scattering defects according to the 90° light scattering method is formed in a region at a depth from the wafer surface of 25 ?m or more but less than 100 ?m, and a layer which has a light scattering defect density of 1×108/cm3 or more according to the 90° light scattering method is formed in a region at a depth of 100 ?m from the wafer surface.

Abstract: To provide a method of removing a heavy metal contained in a thinned semiconductor substrate. A method of removing a heavy metal in a semiconductor substrate of the present invention comprises: attaching, to a rear surface of the semiconductor substrate, a material that lowers a potential barrier of the rear surface of the semiconductor substrate, on a front surface of which a circuit is to be formed or is formed; applying a thermal treatment to the semiconductor substrate under a condition based on a thickness and a resistivity of the semiconductor substrate; and, depositing the heavy metal in the semiconductor substrate on the rear surface.

Abstract: A method for manufacturing a silicon single crystal wafer for IGBT, including introducing a hydrogen atom-containing substance into an atmospheric gas at a hydrogen gas equivalent partial pressure of 40 to 400 Pa, and growing a single crystal having an interstitial oxygen concentration of 8.5×1017 atoms/cm3 or less at a silicon single crystal pulling speed enabling pulling of a silicon single crystal free of grown-in defects. The silicon single crystal is irradiated with neutrons so as to dope with phosphorous; an n-type dopant is added to the silicon melt; or phosphorous is added to the silicon melt so the phosphorous concentration in the silicon single crystal is 2.9×1013 to 2.9×1015 atoms/cm3; a p-type dopant having a segregation coefficient smaller than that of the phosphorous is added to the silicon melt so the concentration in the single crystal is 1×1013 to 1×1015 atoms/cm3 corresponding to the segregation coefficient thereof.

Abstract: A method for manufacturing a silicon wafer includes a step of annealing a silicon wafer which is sliced from a silicon single crystal ingot, thereby forming a DZ layer in a first surface and in a second surface of the silicon wafer and a step of removing either a portion of the DZ layer in the first surface or a portion of the DZ layer in the second surface.

Abstract: By using oxygen-containing silicon wafers obtained by the CZ method and by combining the first heat treatment comprising controlled heat-up operation (ramping) with the second heat treatment comprising high-temperature heat treatment and medium temperature heat treatment in accordance with the process for producing high-resistance silicon wafers according to the present invention, it is possible to obtain high-resistance silicon wafers capable of maintaining their high resistance even after heat treatment in the process of device manufacture while efficiently inhibiting the formation of oxygen donors and preventing changes in resistivity. Further, excellent epitaxial wafers and SOI wafers can be produced using those high-resistance silicon wafers and, therefore, they can be applied in a wide field including high-frequency communication devices and analog/digital hybrid devices, among others.

Abstract: A method for manufacturing a silicon wafer includes a step of annealing a silicon wafer which is sliced from a silicon single crystal ingot, thereby forming a DZ layer in a first surface and in a second surface of the silicon wafer and a step of removing either a portion of the DZ layer in the first surface or a portion of the DZ layer in the second surface.

Abstract: A method for growing a silicon single crystal having a hydrogen defect density of equal to or less than 0.003 pieces/cm2 using a Czochralski method, includes: a crystal growth step performed in an atmospheric gas containing a hydrogen-containing gas so as to allow hydrogen gas to have a partial pressure of equal to or higher than 40 Pa and equal to or lower than 400 Pa; and a cooling state control step of setting the amount of time in a hydrogen aggregation temperature range which is a range of equal to or lower than 850° C. and equal to or higher than 550° C. to be equal to or longer than 100 minutes and equal to or shorter than 480 minutes.