Patents by Inventor Masataka Kawai

Masataka Kawai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240074131
    Abstract: A mounting work system includes at least one feeder automatic exchange work machine configured to mount a component, which is supplied by a tape feeder mounted on a mounting stand, on a board conveyed by a conveyance device, the tape feeder mounted on the mounting stand being configured to be automatically exchanged by an operation of a tape feeder exchange device, at least one feeder manual exchange work machine configured to mount a component, which is supplied by a tape feeder mounted on a mounting stand, on the board conveyed by a conveyance device, the tape feeder mounted on the mounting stand being configured to be manually exchanged by an operator, and a housing formed with a housing space for housing at least one tape feeder, arranged in a conveyance direction of the conveyance devices, and disposed adjacent to the at least one feeder automatic exchange work machine.
    Type: Application
    Filed: January 19, 2021
    Publication date: February 29, 2024
    Applicant: FUJI CORPORATION
    Inventors: Mizuho NOZAWA, Hidetoshi KAWAI, Masataka IWASAKI
  • Patent number: 6724630
    Abstract: In order to progress a mounting consistency of electric devices on a substrate, an electronic device assembly, comprising a lower electronic device having electrodes in a surface opposed to the substrate and an upper electronic device having a plurality of the leads each extending from the side surface of own package toward the substrate.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: April 20, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Nobuhiro Kato, Masataka Kawai
  • Publication number: 20030223198
    Abstract: In order to progress a mounting consistency of electric devices on a substrate, an electronic device assembly, comprising a lower electronic device having electrodes in a surface opposed to the substrate and an upper electronic device having a plurality of the leads each extending from the side surface of own package toward the substrate.
    Type: Application
    Filed: December 3, 2002
    Publication date: December 4, 2003
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuhiro Kato, Masataka Kawai
  • Patent number: 5324985
    Abstract: A semiconductor element such as an encapsulated or non-encapsulated semiconductor chip having a multitude of terminals is mounted on one surface of a quadrate substrate. A multitude of connector pins extend from the other surface of the substrate. A plurality of connector lands are formed on a surface of the substrate and electrically connected to the corresponding terminals of the semiconductor element. The connector lands are electrically connected to the connector pins through wiring. The connector pins have a pitch that is larger near the connector lands than at locations farther away from the lands. The pitch between adjacent connector pins is made larger as necessary or desired so as to allow the passage of an increased number of connecting wires between the adjacent connector pins, thus ensuring high density wiring with improved efficiency.
    Type: Grant
    Filed: May 1, 1992
    Date of Patent: June 28, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomomi Hamada, Seiji Takemura, Masataka Kawai, Takaaki Okidono
  • Patent number: 5251107
    Abstract: A quadrate semiconductor element in the form of a quad flat package, a bare chip, and the like mounted on a substrate has a plurality of first terminals electrically connected through connecting wires to corresponding second terminals which are disposed on the substrate around the semiconductor element. The second terminals are disposed on the substrate such that the number of second terminals per unit area is less at locations near the corners of the quadrate semiconductor element than at the other portions of the substrate. This arrangement enlarges the effective wiring area for the connecting wires at the corners, thus greatly improving wiring efficiency.
    Type: Grant
    Filed: November 27, 1991
    Date of Patent: October 5, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Seiji Takemura, Masataka Kawai
  • Patent number: 5187565
    Abstract: A liquid sealed semiconductor device comprises a base, semiconductor elements which are mounted to the base, a leading pin passing through the base and protruding to the outside of a package, a cap which is jointed to the base and covers the semiconductor elements, liquid filling the package, a sponge provided within the package and an internal cap for fastening the sponge to the inner wall of the package.The sponge absorbs the pressure change due to the expansion or the contraction of the internal liquid so as to prevent the liquid from leaking out of the package and to protect the package from being deformed. Furthermore, the internal cap eliminates the possibility that the sponge would drop down.
    Type: Grant
    Filed: June 18, 1991
    Date of Patent: February 16, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masataka Kawai, Seiji Takemura