Patents by Inventor Masataka Ono

Masataka Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130026241
    Abstract: Provided is a Device, a System, applications and an associated Ecosystem for the consistent and reliable production, creation, generation, management and utilization of two-dimensional (‘2D’) barcodes (‘Codes’) featuring embedded Images, designating the alignment position and alignment size of the embedding Images in 2D Codes and enabling the corresponding outputted Code files by the Device System to be downloaded and or showcased digitally within all forms of digital advertising, media, television, mobile telephony and the world wide web as well as integrated with the production processes for consumer products and packaged goods, printed products, merchandise and other items featuring such 2D Codes creating a public telecommunications platform and or private intranet services featuring a searchable database, directory and or registry of the 2D Codes with embedded Images that have been created by, produced by and outputted by the Device or System.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 31, 2013
    Inventors: Koji SAKAHASHI, Bryan Scott SCHAFFNER, Masataka ONO
  • Patent number: 8058124
    Abstract: The semiconductor device, which provides reduced electric current leakage and parasitic resistance to achieve stable current gain, is provided. A first polycrystalline semiconductor layer is grown on a p-type polycrystalline silicon film exposed in a lower surface of a visor section composed of a multiple-layered film containing a p-type polycrystalline silicon film and a silicon nitride film, while growing the first semiconductor layer on a n-type collector layer, and then the first polycrystalline semiconductor layer is selectively removed.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: November 15, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Masataka Ono, Akiko Fujita
  • Publication number: 20100197122
    Abstract: The semiconductor device, which provides reduced electric current leakage and parasitic resistance to achieve stable current gain, is provided. A first polycrystalline semiconductor layer is grown on a p-type polycrystalline silicon film exposed in a lower surface of a visor section composed of a multiple-layered film containing a p-type polycrystalline silicon film and a silicon nitride film, while growing the first semiconductor layer on a n-type collector layer, and then the first polycrystalline semiconductor layer is selectively removed.
    Type: Application
    Filed: April 13, 2010
    Publication date: August 5, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Masataka ONO, Akiko FUJITA
  • Patent number: 7728358
    Abstract: The semiconductor device, which provides reduced electric current leakage and parasitic resistance to achieve stable current gain, is provided. A first polycrystalline semiconductor layer is grown on a p-type polycrystalline silicon film exposed in a lower surface of a visor section composed of a multiple-layered film containing a p-type polycrystalline silicon film and a silicon nitride film, while growing the first semiconductor layer on a n-type collector layer, and then the first polycrystalline semiconductor layer is selectively removed.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: June 1, 2010
    Assignee: NEC Electronics Corporation
    Inventors: Masataka Ono, Akiko Fujita
  • Publication number: 20090039393
    Abstract: The semiconductor device, which provides reduced electric current leakage and parasitic resistance to achieve stable current gain, is provided. A first polycrystalline semiconductor layer is grown on a p-type polycrystalline silicon film exposed in a lower surface of a visor section composed of a multiple-layered film containing a p-type polycrystalline silicon film and a silicon nitride film, while growing the first semiconductor layer on a n-type collector layer, and then the first polycrystalline semiconductor layer is selectively removed.
    Type: Application
    Filed: August 7, 2008
    Publication date: February 12, 2009
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Masataka ONO, Akiko FUJITA
  • Patent number: 4581818
    Abstract: A die-assisted squeeze-forming apparatus, for bending hooks of a plate against a container e.g. a tank, is able to be used with various shapes of the plate and container without replacement of the die structure. To that end, the apparatus is provided with a calking die structure which has a plurality of divided, relatively movable dies, each movable die being subject to being individually actuated by an actuator. The preferred embodiment of the apparatus also includes a controlling means which controls the movement of the actuators and a detecting means which detects a feature of the tank which is symbolic of the size and shape of that tank. The electric signal which indicates the feature of the container is applied to the controlling means. Then the controlling means sends a respective controlling signal for controlling the movement of the actuators in order to cause an adequate rearrangement of the shape of the calking die structure should the tank be different in size or shape then the preceeding one.
    Type: Grant
    Filed: October 29, 1984
    Date of Patent: April 15, 1986
    Assignee: Nippondenso Co., Ltd.
    Inventors: Fumio Kondou, Kazuyori Sakakibara, Masataka Ono