Abstract: A semiconductor device includes a silicon substrate, an aluminum nitride layer which is arranged on the silicon substrate and has a region where silicon is doped thereof as an impurity, a buffer layer which is arranged on the aluminum nitride layer and has a structure where a plurality of nitride semiconductor films are laminated, and a semiconductor functional layer which is arranged on the buffer layer and made of nitride semiconductor.

Abstract: A semiconductor device includes a substrate, a buffer layer, and a compound semiconductor layer. The buffer layer is configured by laminating two or more pairs of a first buffer and a second buffer. The first buffer is formed by laminating one or more pairs of an AlN layer and a GaN layer. The second buffer is formed of a GaN layer. A total Al composition of a pair of the first buffer and the second buffer on the compound semiconductor layer side is higher than that of a pair of the first buffer and the second buffer on the substrate side.

Abstract: A semiconductor device includes a silicon substrate, an aluminum nitride layer which is arranged on the silicon substrate and has a region where silicon is doped thereof as an impurity, a buffer layer which is arranged on the aluminum nitride layer and has a structure where a plurality of nitride semiconductor films are laminated, and a semiconductor functional layer which is arranged on the buffer layer and made of nitride semiconductor.

Abstract: A semiconductor device includes a substrate, a buffer layer, and a compound semiconductor layer. The buffer layer is configured by laminating two or more pairs of a first buffer and a second buffer. The first buffer is formed by laminating one or more pairs of an AlN layer and a GaN layer. The second buffer is formed of a GaN layer. A total Al composition of a pair of the first buffer and the second buffer on the compound semiconductor layer side is higher than that of a pair of the first buffer and the second buffer on the substrate side.

Abstract: A high electron mobility transistor is disclosed which has a triple-layered main semiconductor region formed on a silicon substrate via a multilayered buffer region. The multilayered buffer region is in the form of alternations of an aluminum nitride layer and a gallium nitride layer. Whilst the aluminum nitride layers are of n-like conductivity, the gallium nitride layers are doped into p-type conductivity, with the consequent creation of pn junctions between the two kinds of buffer layers. Another pn junction is formed between one p-type gallium nitride layer and the adjoining n-like electron transit layer included in the main semiconductor region. The pn junctions serve for reduction of current leakage.

Abstract: A main semiconductor region of semiconducting nitrides is formed on a silicon substrate via a buffer region of semiconducting nitrides to provide devices such as HEMTs, MESFETs and LEDs. In order to render the wafer proof against warping, the buffer region is divided into a first and a second multilayered buffer subregion. The first buffer subregion comprises multiple alterations of a multi-sublayered first buffer layer and a non-sublayered second buffer layer. Each multi-sublayered first buffer layer of the first buffer subregion comprises multiple alternations of a first and a second buffer sublayer. The second buffer sublayers of each multi-sublayered first buffer layer either do not contain aluminum or do contain it in a higher proportion than do the first buffer sublayers. The second multilayered buffer subregion comprises multiple alternations of a first and a second buffer layer.

Abstract: A semiconductor device having nitride semiconductor layers has a buffer layer (2) in the form of alternations of a first sublayer (8) of AlN and a second layer (9) of GaN with interposition of a third layer (10) of p-type GaN therebetween. On this buffer layer there is grown a main semiconductor region (3) having nitride semiconductor layers for providing a high-electron-mobility transistor or the like. From 0.5 to 50.0 nanometers thick, the third sublayers (10) of the buffer layer restrict the generation of two-dimensional electron gas and so prevent the buffer layer from becoming unnecessarily low in resistance.

Abstract: A substrate system of the kind having a buffer region interposed between a silicon substrate proper and a nitride semiconductor region in order to make up for a difference in linear expansion coefficient therebetween. Electrodes are formed on the nitride semiconductor layer or layers in order to provide HEMTs or MESFETs. The buffer region is a lamination of a multiplicity of buffer layers each comprising a first, a second, and a third buffer sublayer of nitride semiconductors, in that order from the silicon substrate proper toward the nitride semiconductor region. The three sublayers of each buffer layer contain aluminum in varying proportions including zero. The aluminum proportion of the third buffer sublayer is either zero or intermediate that of the first buffer sublayer and that of the second.

Abstract: A main semiconductor region of semiconducting nitrides is formed on a silicon substrate via a buffer region of semiconducting nitrides to provide devices such as HEMTs, MESFETs and LEDs. In order to render the wafer proof against warping, the buffer region is divided into a first and a second multilayered buffer subregion. The first buffer subregion comprises multiple alterations of a multi-sublayered first buffer layer and a non-sublayered second buffer layer. Each multi-sublayered first buffer layer of the first buffer subregion comprises multiple alternations of a first and a second buffer sublayer. The second buffer sublayers of each multi-sublayered first buffer layer either do not contain aluminum or do contain it in a higher proportion than do the first buffer sublayers. The second multilayered buffer subregion comprises multiple alternations of a first and a second buffer layer.

Abstract: A semiconductor device having: a substrate; nitride-based compound semiconductor layers formed on one main surface of the substrate and made of a nitride-based compound semiconductor; a first electrode formed on the nitride-based compound semiconductor layers and having a Schottky junction with the nitride-based compound semiconductor layers; and a second electrode formed on the nitride-based compound semiconductor layers and subjected to low resistance contact with the nitride-based compound semiconductor layers, wherein the first electrode and substrate are electrically connected through a connection conductor.

Abstract: A Schottky diode includes a substrate, a channel layer formed on the substrate and made of nitride-based compound semiconductor, an anode electrode and a cathode electrode which constitute an end portion of the current path of the semiconductor element, and a dummy electrode electrically connected to the substrate. The anode electrode is formed to have a Schottky barrier junction with the channel layer. The cathode layer is formed to have a low-resistance contact with the channel layer.

Abstract: A high electron mobility transistor is disclosed which has a triple-layered main semiconductor region formed on a silicon substrate via a multilayered buffer region. The multilayered buffer region is in the form of alternations of an aluminum nitride layer and a gallium nitride layer. Whilst the aluminum nitride layers are of n-like conductivity, the gallium nitride layers are doped into p-type conductivity, with the consequent creation of pn junctions between the two kinds of buffer layers. Another pn junction is formed between one p-type gallium nitride layer and the adjoining n-like electron transit layer included in the main semiconductor region. The pn junctions serve for reduction of current leakage.

Abstract: A low-resistance silicon baseplate (11) has formed thereon a buffer layer 12 in the form of an alternating lamination of AlN sublayers (12a) and GaN sublayers (12b). On this buffer layer there are formed an n-type semiconductor region (13) of gallium nitride, an active layer (14) of gallium indium nitride, and a p-type semiconductor region (15) of gallium nitride, in that order. An anode (17) is formed on the p-type semiconductor region (15), and a cathode (18) on the baseplate (11).

Abstract: A semiconductor device having nitride semiconductor layers has a buffer layer (2) in the form of alternations of a first sublayer (8) of AlN and a second layer (9) of GaN with interposition of a third layer (10) of p-type GaN therebetween. On this buffer layer there is grown a main semiconductor region (3) having nitride semiconductor layers for providing a high-electron-mobility transistor or the like. From 0.5 to 50.0 nanometers thick, the third sublayers (10) of the buffer layer restrict the generation of two-dimensional electron gas and so prevent the buffer layer from becoming unnecessarily low in resistance.

Abstract: A low-resistance silicon baseplate (11) has formed thereon a buffer layer 12 in the form of an alternating lamination of AlN sublayers (12a) and GaN sublayers (12b). On this buffer layer there are formed an n-type semiconductor region (13) of gallium nitride, an active layer (14) of gallium indium nitride, and a p-type semiconductor region (15) of galliumnitride, in that order. An anode (17) is formed on the p-type semiconductor region (15), and a cathode (18) on the baseplate (11).

Abstract: A substrate system of the kind having a buffer region interposed between a silicon substrate proper and a nitride semiconductor region in order to make up for a difference in linear expansion coefficient therebetween. Electrodes are formed on the nitride semiconductor layer or layers in order to provide HEMTs or MESFETs. The buffer region is a lamination of a multiplicity of buffer layers each comprising a first, a second, and a third buffer sublayer of nitride semiconductors, in that order from the silicon substrate proper toward the nitride semiconductor region. The three sublayers of each buffer layer contain aluminum in varying proportions including zero. The aluminum proportion of the third buffer sublayer is either zero or intermediate that of the first buffer sublayer and that of the second.

Abstract: A low-resistance silicon baseplate (11) has formed thereon a buffer layer 12 in the form of an alternating lamination of AlN sublayers (12a) and GaN sublayers (12b). On this buffer layer there are formed an n-type semiconductor region (13) of gallium nitride, an active layer (14) of gallium indium nitride, and a p-type semiconductor region (15) of galliumnitride, in that order. An anode (17) is formed on the p-type semiconductor region (15), and a cathode (18) on the baseplate (11).

Abstract: A low-resistance silicon baseplate (11) has formed thereon a buffer layer 12 in the form of an altering lamination of AlN sublayers (12a) and GaN sublayers (12b). On this buffer layer there are formed an n-type semiconductor region (13) of gallium nitride, an active layer (14) of gallium indium nitride, and a p-type semiconductor region (15) of gallium nitride, in that order. An anode (17) is formed on the p-type semiconductor region (15), and a cathode (18) on the baseplate (11).