Patents by Inventor Masatake Kusakari

Masatake Kusakari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit
    Patent number: 6433407
    Abstract: A protection circuit in a semiconductor integrated circuit having a master slice I/O circuit comprises an internal circuit, a pad, and a desired number of protection elements connected in parallel between the internal circuit and the pad. Each protection element includes a P-channel MOS transistor which outputs a first power supply voltage level signal on the basis of an output signal of the internal circuit, a N-channel MOS transistor which outputs a second power supply voltage level signal on the basis of the output signal of the internal circuit, a resistor connected between a signal line connected to the pad and an output terminal of the P-channel MOS transistor, and a resistor connected between the signal line and an output terminal of the N-channel MOS transistor.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: August 13, 2002
    Assignee: Fujitsu Limited
    Inventors: Kunihiko Gotoh, Katsuaki Aizawa, Kazuhiro Kitani, Masatake Kusakari
  • Semiconductor integrated circuit
    Publication number: 20010050411
    Abstract: A protection circuit in a semiconductor integrated circuit having a master slice I/O circuit comprises an internal circuit, a pad, and a desired number of protection elements connected in parallel between the internal circuit and the pad. Each protection element includes a P-channel MOS transistor which outputs a first power supply voltage level signal on the basis of an output signal of the internal circuit, a N-channel MOS transistor which outputs a second power supply voltage level signal on the basis of the output signal of the internal circuit, a resistor connected between a signal line connected to the pad and an output terminal of the P-channel MOS transistor, and a resistor connected between the signal line and an output terminal of the N-channel MOS transistor.
    Type: Application
    Filed: March 9, 2001
    Publication date: December 13, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Kunihiko Gotoh, Katsuaki Aizawa, Kazuhiro Kitani, Masatake Kusakari