Patents by Inventor Masato Abe

Masato Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020059026
    Abstract: In a vehicle operation assist control system for assisting a vehicle operator to operate a vehicle, a distance to the obstacle and a width of the obstacle are detected by a radar or the like, and, when an obstacle is detected, the system determines an evasion path and accordingly modifies the map information available to the system. Therefore, the system, being aware of the situation, would not interfere with the vehicle operator taking an evasive action. The evasive path may be defined as a curvature which changes as a sinusoidal mathematical function of the position of the vehicle along the path. The control system may be based on a yaw rate control or a vehicle side slip angle control.
    Type: Application
    Filed: November 5, 2001
    Publication date: May 16, 2002
    Inventors: Masato Abe, Yoshimi Furukawa
  • Patent number: 6334656
    Abstract: The favorable responsiveness and the stability of a vehicle is sought to be achieved even under extreme traveling conditions. A yawing moment which a vehicle is desired to produce is computed according to a dynamic state quantity of the vehicle such as the vehicle speed and the cornering force of each of the wheels, and a braking force or a traction which is applied to each of the wheels is individually controlled so as to achieve the computed yawing moment. Therefore, even under conditions where the gripping force of the tires is close to a limit, it is possible to improve the responsiveness and stability of the behavior of the vehicle. Further, by using the sliding mode control, it is possible to improve the stability and the robustness of the control system.
    Type: Grant
    Filed: May 8, 1997
    Date of Patent: January 1, 2002
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Yoshimi Furukawa, Masato Abe
  • Patent number: 6233513
    Abstract: Provided are a method and system for computing a vehicle body slip angle in the vehicle movement control so as to allow the vehicle movement to be controlled with an adequate response and stability for practical purposes even without directly detecting or accurately estimating the frictional coefficient between the road surface and the tire. A tire slip angle is computed from a yaw rate, a vehicle speed, a vehicle body slip angle and a road wheel steering angle; a cornering force is computed from a dynamic model of the tire by taking into account at least the tire slip angle; and a hypothetical vehicle body slip angle is computed from the cornering force, the vehicle speed and the yaw rate; the tire slip angle being computed by feeding back the hypothetical vehicle body slip angle in a recursive manner.
    Type: Grant
    Filed: November 17, 1998
    Date of Patent: May 15, 2001
    Assignees: Honda Giken Kogyo Kabushiki
    Inventors: Yoshimi Furukawa, Yasuji Shibahata, Masato Abe
  • Patent number: 5438600
    Abstract: A first odd-number frequency divider for frequency-dividing and outputting an input signal of optional frequency includes a counter having cascade-connected n [n=1, 2, 3] elements of flip-flop circuits for receiving an input signal and outputting a 1/[2n+1] frequency-divided signal, a register having cascade-connected n [n=1, 2, 3] elements of flip-flop circuits for shifting the 1/[2n+1] frequency-divided signal successively synchronously with the input signal, a latch circuit for holding a register output signal of the [n-1]th flip-flop circuit of the register synchronously with an inverted signal of the input signal, and a logic circuit for receiving an inverted latch output signal outputted from the latch circuit and a register output signal of the nth flip-flop circuit and outputting the 1/[2n+1] frequency-divided signal.
    Type: Grant
    Filed: November 23, 1993
    Date of Patent: August 1, 1995
    Assignee: Fujitsu Limited
    Inventors: Fusao Seki, Masato Abe
  • Patent number: 5313274
    Abstract: In a matrix operation apparatus for calculating output signals by multiplying input signals with coefficients, a plurality of matrix element calculating circuits multiply the input signals with corresponding coefficients to obtain matrix elements. An output calculating circuit adds and subtracts the obtained matrix elements to obtain one of the output signals. In this case, the coefficients are changed by a coefficient changing circuit which also controls the output calculating circuit, and thus the output calculating circuit generates the plurality of output signals in a time-divisional manner.
    Type: Grant
    Filed: August 20, 1991
    Date of Patent: May 17, 1994
    Assignee: Fujitsu Limited
    Inventor: Masato Abe
  • Patent number: 4973973
    Abstract: A code converter includes an extraction device for extracting a reference level from a binary-coded input signal, which is offset at a predetermined voltage level and which varies arbitrarily with the same polarity as the voltage level. A twos-complement conversion device, connected to the extraction device, converts the reference level into a twos-complement value. A creation device, connected to the extraction device and the twos-complement conversion device adds an output signal of the twos-complement conversion device and the binary-coded input signal, thereby producing a bipolar binary-coded output signal to which a polarity bit is added.
    Type: Grant
    Filed: March 30, 1989
    Date of Patent: November 27, 1990
    Assignee: Fujitsu Limited
    Inventors: Masato Abe, Fumitaka Asami
  • Patent number: 4811260
    Abstract: A signal processing circuit comprises a constant value generating circuit for generating a constant value (.alpha..sub.i) corresponding to a delay time (d.sub.i) for an input signal (V.sub.i (t)); an adding/subtracting circuit for alternately adding the constant value to the input signal and subtracting the constant value from the input signal for every half period of the input signal; and an amplitude correcting circuit for correcting an amplitude of an output signal of the adding/subtracting circuit for every half period of the input signal so that a delayed output signal (V.sub.o (t)) having a waveform corresponding to a waveform of the input signal is produced.
    Type: Grant
    Filed: November 10, 1987
    Date of Patent: March 7, 1989
    Assignee: Fujitsu Limited
    Inventors: Masato Abe, Fumitaka Asami
  • Patent number: 4786823
    Abstract: Noise pulses having both polarities which are superposed on an input signal having a binary state of H/L levels forming a rectangular waveform, are suppressed or eliminated before transferring the input signal to an output stage. A noise pulse suppressing circuit is provided which comprises a latch circuit, a counter circuit, and a logic circuit including NAND gates and INVERTERs. For the latch circuit and the counter circuit, D-type flip-flops are also utilized. The input signal is inputted to a data input terminal of a flip-flop of the latch circuit and outputted from the data output terminal thereof. The latch circuits are triggered by a pulse signal applied to a clock terminal thereof. The above triggering pulse signal is generated by the counter circuit and the logic circuit, and it has a short pulse waveform responding to the input signal but delayed. No pulse in the output is produced which corresponds to the noise pulses in the input signal.
    Type: Grant
    Filed: April 17, 1987
    Date of Patent: November 22, 1988
    Assignee: Fujitsu Limited
    Inventors: Masato Abe, Fumitaka Asami