Abstract: A bus switch circuit includes a switch element having two terminals whose electrical connection is controlled when a control signal is input into a control terminal. The bus switch circuit further includes a first pull-up resistor and first switch circuit, a second pull-up resistor and second switch circuit. The control signal controls the electrical connections of the first and second switch circuits.

Abstract: An analog switch circuit includes: an analog switch composed of a first P-channel MOS transistor and a first N-channel transistor, a gate of which receives a control signal; a comparison circuit comparing potentials of a first input-output-terminal and a second input-output terminal, and conveying a higher potential to a well where the first P-channel MOS transistor is formed; a first potential conveying circuit conveying a potential of the well where the first P-channel MOS transistor is formed to a gate of the first P-channel MOS transistor when the analog switch is in the OFF state; a second potential conveying circuit operating on the basis of a control signal to convey the potential of the well where the first P-channel MOS transistor is formed to the gate of the first P-channel MOS transistor to turn off the first P-channel MOS transistor; and a third potential conveying section operating on the basis of the control signal to turn on the first P-channel MOS transistor.

Abstract: A bus switch circuit includes a switch element having two terminals whose electrical connection is controlled when a control signal is input into a control terminal. The bus switch circuit further includes a first pull-up resistor and first switch circuit, a second pull-up resistor and second switch circuit. The control signal controls the electrical connections of the first and second switch circuits.

Abstract: An analog switch circuit includes: an analog switch composed of a first P-channel MOS transistor and a first N-channel transistor, a gate of which receives a control signal; a comparison circuit comparing potentials of a first input-output-terminal and a second input-output terminal, and conveying a higher potential to a well where the first P-channel MOS transistor is formed; a first potential conveying circuit conveying a potential of the well where the first P-channel MOS transistor is formed to a gate of the first P-channel MOS transistor when the analog switch is in the OFF state; a second potential conveying circuit operating on the basis of a control signal to convey the potential of the well where the first P-channel MOS transistor is formed to the gate of the first P-channel MOS transistor to turn off the first P-channel MOS transistor; and a third potential conveying section operating on the basis of the control signal to turn on the first P-channel MOS transistor.