Patents by Inventor Masato Fuma
Masato Fuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8391113Abstract: An optical disc has a read-only system lead-in area and a recordable data area. Disc boundary information representing a boundary in a radial direction of an area on which capability of recording at a predetermined recording speed is guaranteed is recorded on the system lead-in area while being related to each tuple speed. An optical disc device, upon user's instruction of tuple-speed recording, compares the boundary information related to the instructed tuple speed with a present recording position, performs recording at the instructed tuple speed if the present recording position is on the outside of the boundary, and performs recording at a tuple speed lower than the instructed tuple speed if the present recording position is on the inside of the boundary.Type: GrantFiled: February 13, 2009Date of Patent: March 5, 2013Assignees: Sanyo Electric Co., Ltd., Toshiba Corporation, NEC CorporationInventors: Morio Nakatani, Masato Fuma, Kazuo Watabe, Yutaka Kashihara, Akihito Ogawa, Yutaka Yamanaka, Tatsunori Ide, Shuichi Ohkubo
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Patent number: 7643394Abstract: In an optical disk recording method of recording data onto a recordable optical disk which includes a data zone where data is recorded and a management data zone where management data indicating the recorded part of the data zone is recorded, an extended management data zone in which the management data is to be recorded is set in the data zone in response to an extension instruction.Type: GrantFiled: June 13, 2005Date of Patent: January 5, 2010Assignees: Kabushiki Kaisha Toshiba, NEC Corporation, Sanyo Electric Co., Ltd.Inventors: Yutaka Kashihara, Hideki Takahashi, Akihito Ogawa, Yutaka Yamanaka, Shigeru Shimonou, Tatsunori Ide, Tsuyoshi Yamamoto, Katsuki Hattori, Masato Fuma
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Publication number: 20090207721Abstract: An optical disc has a read-only system lead-in area and a recordable data area. Disc boundary information representing a boundary in a radial direction of an area on which capability of recording at a predetermined recording speed is guaranteed is recorded on the system lead-in area while being related to each tuple speed. An optical disc device, upon user's instruction of tuple-speed recording, compares the boundary information related to the instructed tuple speed with a present recording position, performs recording at the instructed tuple speed if the present recording position is on the outside of the boundary, and performs recording at a tuple speed lower than the instructed tuple speed if the present recording position is on the inside of the boundary.Type: ApplicationFiled: February 13, 2009Publication date: August 20, 2009Applicants: SANYO Electric Co., Ltd., Toshiba Corporation, NEC CorporationInventors: Morio Nakatani, Masato Fuma, Kazuo Watabe, Yutaka Kashihara, Akihito Ogawa, Yutaka Yamanaka, Tatsunori Ide, Shuichi Ohkubo
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Patent number: 7492697Abstract: Data is recorded on an optical disc using a combination of a user data area where user data is recorded, a control data area for reproduction provided on an inner radius side of the user data area, and an outer guard zone provided on an outer radius side of the user data area as a unit of one recording operation. In this configuration, a track pitch TP of the optical disc is greater than or equal to 0.3 ?m and smaller than or equal to 0.4 ?m, and the width of the outer guard zone along a radius direction of the optical disc is greater than or equal to a value of (100×TP) and smaller than or equal to a value of (125×TP).Type: GrantFiled: June 1, 2005Date of Patent: February 17, 2009Assignees: Sanyo Electric Co., Ltd., NEC CorporationInventors: Tsuyoshi Yamamoto, Katsuki Hattori, Masato Fuma, Yutaka Yamanaka, Tatsunori Ide, Shigeru Shimonou, Yutaka Kashihara, Akihito Ogawa, Hideki Takahashi
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Patent number: 7478306Abstract: An error correction circuit capable of detecting burst errors included in a data signal with reliability. The error correction circuit comprises a reading unit, a first estimation unit, a second estimation unit, and a correction unit. The reading unit reads the data signal. The first estimation unit estimates error locations based on BIS code included in the data signal, and stores the locations into an error location storing unit. The second estimation unit estimates error locations based on characteristics of bit strings adjoining the BIS code, and stores the locations into the error location storing unit. The correction unit identifies erasure locations based on the error locations stored in the error location storing unit, and performs erasure correction on the erasure locations identified. Since the error locations are estimated based on the BIS code and the characteristics of the bit strings adjoining the BIS code as well, it is possible to detect burst errors without fail.Type: GrantFiled: March 30, 2005Date of Patent: January 13, 2009Assignee: Sanyo Electric Co., L:td.Inventors: Miyuki Okamoto, Satoshi Kanai, Masato Fuma
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Patent number: 7345974Abstract: An object of the present invention is to provide an optical recording/reproducing apparatus capable of improving medium usability through a laser power adjusting process while keeping compatibility with a read only type medium. The optical recording/reproducing apparatus adjusts laser power using a PCA till the PCA is used up. After the PCA is used up, an additional area is reserved at the outermost circumference position, thereafter when the additional area is used up, a new additional area is reserved at an inner circumference side of the used up additional area to adjust laser power. The additional area is reserved at an outer circumference than a lead-out area, and therefore format compatibility with a read only type optical disc can be maintained. The additional area is reserved only when the PCA is used up, thus capacity compatibility with a read only type optical disc can be maintained while laser power is adjusted with only the PCA.Type: GrantFiled: October 28, 2004Date of Patent: March 18, 2008Assignee: Sanyo Electric Co., Ltd.Inventors: Takanori Kishida, Tsuyoshi Yamamoto, Katsumi Hattori, Masato Fuma, Hiroshi Watanabe
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Publication number: 20050283512Abstract: To provide a data encoding circuit capable of securing real-timeness of a recording operation even in a memory of a low operation clock frequency by reducing the number of times of accessing the memory, and simultaneously reducing power consumption and memory costs. Prior to error correction encoding of a PI direction, error correction encoding of a PO direction is carried out at a PO arithmetic operation circuit (105), and an obtained PO code is added to corresponding data and written in a memory (101). Subsequently, data are read line by line in a PI direction from the memory (101) to a PI arithmetic operation circuit (110), a PI code is added to the data, and the data are sequentially output to a modulation circuit (200). Thus, it is possible to omit memory access when the data is read from the memory (101) to the modulation circuit (200) and memory access when the error correction code is written in the memory by the PI arithmetic operation circuit.Type: ApplicationFiled: May 20, 2005Publication date: December 22, 2005Inventors: Miyuki Okamoto, Masato Fuma, Shin'ichiro Tomisawa, Satoshi Noro, Hidemitsu Senoo
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Publication number: 20050276191Abstract: In an optical disk recording method of recording data onto a recordable optical disk which includes a data zone where data is recorded and a management data zone where management data indicating the recorded part of the data zone is recorded, an extended management data zone in which the management data is to be recorded is set in the data zone in response to an extension instruction.Type: ApplicationFiled: June 13, 2005Publication date: December 15, 2005Inventors: Yutaka Kashihara, Hideki Takahashi, Akihito Ogawa, Yutaka Yamanaka, Shigeru Shimonou, Tatsunori Ide, Tsuyoshi Yamamoto, Katsuki Hattori, Masato Fuma
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Publication number: 20050270966Abstract: Data is recorded on an optical disc using a combination of a user data area where user data is recorded, a control data area for reproduction provided on an inner radius side of the user data area, and an outer guard zone provided on an outer radius side of the user data area as a unit of one recording operation. In this configuration, a track pitch TP of the optical disc is greater than or equal to 0.3 ?m and smaller than or equal to 0.4 ?m, and the width of the outer guard zone along a radius direction of the optical disc is greater than or equal to a value of (100×TP) and smaller than or equal to a value of (125×TP).Type: ApplicationFiled: June 1, 2005Publication date: December 8, 2005Applicants: SANYO ELECTRIC CO., LTD., NEC Corporation, Kabushiki Kaisha ToshibaInventors: Tsuyoshi Yamamoto, Katsuki Hattori, Masato Fuma, Yutaka Yamanaka, Tatsunori Ide, Shigeru Shimonou, Yutaka Kashihara, Akihito Ogawa, Hideki Takahashi
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Publication number: 20050262416Abstract: To provide a data encoding circuit capable of securing real-timeness of a recording operation even in a memory of a low operation clock frequency by reducing the number of times of accessing the memory, and simultaneously reducing power consumption and memory costs. Prior to its writing in a memory (101), data from a host is input to an EDC arithmetic operation circuit (110) and a scrambling arithmetic operation circuit (111) to be processed, and then the error correction codes are added to the data written in the memory (101) from the scrambling arithmetic operation circuit (111) by a PI arithmetic operation circuit (104) and a PO arithmetic operation circuit (105). Accordingly, it is possible to omit memory access when the data is written from the host in the memory, and memory access when the data is read from the memory to the EDC arithmetic operation circuit. Thus, it is possible to reduce an operation clock frequency of the memory (101).Type: ApplicationFiled: May 20, 2005Publication date: November 24, 2005Inventors: Miyuki Okamoto, Masato Fuma, Shin'ichiro Tomisawa, Satoshi Noro, Hidemitsu Senoo
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Publication number: 20050262417Abstract: To provide a data encoding circuit capable of securing real-timeness of a recording operation even in a memory of a low operation clock frequency by reducing the number of times of accessing the memory, and simultaneously reducing power consumption and memory costs. Prior to its writing in a memory (101), data from a host is processed by an EDC arithmetic operation circuit (110) and a scrambling arithmetic operation circuit (111), and written in the memory (101). Next, error correction encoding of a PO direction is executed at a PO arithmetic operation circuit (105), and an obtained PO code is added to corresponding data to be written in the memory (101). Subsequently, the data are read in a PI direction line by line from the memory (101) to a PI arithmetic operation circuit (112). A PI code is added to the data, and the data are sequentially output to a modulation circuit (200).Type: ApplicationFiled: May 20, 2005Publication date: November 24, 2005Inventors: Miyuki Okamoto, Masato Fuma, Shin'ichiro Tomisawa, Satoshi Noro, Hidemitsu Senoo
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Publication number: 20050229070Abstract: An error correction circuit capable of detecting burst errors included in a data signal with reliability. The error correction circuit comprises a reading unit, a first estimation unit, a second estimation unit, and a correction unit. The reading unit reads the data signal. The first estimation unit estimates error locations based on BIS code included in the data signal, and stores the locations into an error location storing unit. The second estimation unit estimates error locations based on characteristics of bit strings adjoining the BIS code, and stores the locations into the error location storing unit. The correction unit identifies erasure locations based on the error locations stored in the error location storing unit, and performs erasure correction on the erasure locations identified. Since the error locations are estimated based on the BIS code and the characteristics of the bit strings adjoining the BIS code as well, it is possible to detect burst errors without fail.Type: ApplicationFiled: March 30, 2005Publication date: October 13, 2005Inventors: Miyuki Okamoto, Satoshi Kanai, Masato Fuma
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Publication number: 20050099929Abstract: An optical disk to which a laser ray irradiated from an optical pickup device equipped in an optical disk recording and replaying apparatus is incident, comprises two signal layers including a first signal layer and a second signal layer formed from a light incident surface side, wherein a visible image can be formed in the second signal layer (1D) by a laser ray irradiated from the light incident surface side.Type: ApplicationFiled: November 10, 2004Publication date: May 12, 2005Applicant: Sanyo Electric Co., Ltd.Inventors: Tsuyoshi Yamamoto, Katsuki Hattori, Shinji Kobayashi, Hiroshi Watanabe, Masato Fuma, Akira Tsukihashi
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Publication number: 20050094519Abstract: An object of the present invention is to provide an optical recording/reproducing apparatus capable of improving medium usability through a laser power adjusting process while keeping compatibility with a read only type medium. The optical recording/reproducing apparatus adjusts laser power using a PCA till the PCA is used up. After the PCA is used up, an additional area is reserved at the outermost circumference position, thereafter when the additional area is used up, a new additional area is reserved at an inner circumference side of the used up additional area to adjust laser power. The additional area is reserved at an outer circumference than a lead-out area, and therefore format compatibility with a read only type optical disc can be maintained. The additional area is reserved only when the PCA is used up, thus capacity compatibility with a read only type optical disc can be maintained while laser power is adjusted with only the PCA.Type: ApplicationFiled: October 28, 2004Publication date: May 5, 2005Inventors: Takanori Kishida, Tsuyoshi Yamamoto, Katsumi Hattori, Masato Fuma, Hiroshi Watanabe
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Publication number: 20050091447Abstract: The present invention aims at providing an information recording and reproducing device which cannot only maintain interchangeability with the reproducing dedicated type media but also realize enhancement of reliability of media based on spare processing as appropriate. A spare area is selectively secured in accordance with whether or not an instruction indicating that a spare area is secured is detected. The instruction indicating that a spare area is secured, for example, is issued by utilizing a method in which a user directly selects whether or not data is recorded in a high reliability mode to set the selection results, or the like. When first recording processing is started, firstly, after an area for recording of a data block for first lead-in is secured in an unrecorded area, first user data is recorded from a position next thereto.Type: ApplicationFiled: October 26, 2004Publication date: April 28, 2005Inventors: Toshitaka Kuma, Tsuyoshi Yamamoto, Katsumi Hattori, Masato Fuma, Hiroshi Watanabe
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Patent number: 6542865Abstract: A method according to the present invention generates weight data for each audio band and assigns a number of bits to each band according to the weight data. The method then calculates a total of the numbers of bits of one block and compares the total with an upper limit and with a lower limit of a compression target value. Based on the comparison result, the method increases or decreases the value of the weight data to update it. The method reassigns a number of bits based on the updated weight data.Type: GrantFiled: February 18, 1999Date of Patent: April 1, 2003Assignee: Sanyo Electric Co., Ltd.Inventors: Fumiaki Nagao, Masato Fuma, Miyuki Okamoto
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Patent number: 6510490Abstract: User data transmitted from the host side is first stored in write cache regions of an SDRAM 12 on the basis of an error correction process. When executing an ECC•EDC encode process of adding redundancy data such as an error correction code to the stored user data on the basis of the error correction processing, an encode region of SDRAM 12 is used. The data subjected to the ECC•EDC encode process is sequentially read out from encode region to be modulated and then written onto a disk.Type: GrantFiled: March 15, 2001Date of Patent: January 21, 2003Assignee: Sanyo Electric Co., Ltd.Inventors: Masato Fuma, Miyuki Okamoto
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Patent number: 6434686Abstract: A write address counter counts a write clock WCK and determines output as a write address, while read address counter counts a read clock RCK and determines output as a read address. The position of LSB in both the counters is shifted by the same number of bits at predetermined intervals, and the position of LSB of the read address counter before shifting is corresponded with the shifted position of the write address counter after shifting. Both the counters count and determine their outputs as write and read addresses. Thus, memory capacity can be reduced, and data can be written and read with different write and read orders.Type: GrantFiled: January 27, 1999Date of Patent: August 13, 2002Assignee: Sanyo Electric Co., Ltd.Inventors: Masaru Matsui, Masato Fuma
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Patent number: 6345285Abstract: Logarithm of data x being input is taken to calculate a decibel value y. The input value x is separated into mantissa value a and exponent value b by a separator or on the basis of an expression x=a·2b. Logarithmic value 10·log10a corresponding to the mantissa value a is read from ROM. The exponent value b is multiplied with a constant 10·log102 for logarithm of 2 by a multiplier. A logarithmic value of the value a read from the ROM is added to b·10·log102 output from the multiplier by an adder to obtain the decibel value y. Thus, a simple circuit can compute the decibel value at a high speed.Type: GrantFiled: January 19, 1999Date of Patent: February 5, 2002Assignee: Sanyo Electric Co., Ltd.Inventors: Fumiaki Nagao, Masato Fuma
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Patent number: 6308194Abstract: There is disclosed a discrete cosine transform circuit for use in a voice recording/reproducing device to solve problems that RAM in which data is stored is frequently accessed and that the power consumption is large. In discrete cosine transform, an algorithm can be constituted to include four or less items of operand data in one operation equation. Correspondingly, four registers 62-1 to 62-4 are arranged on the output side of RAM 60. The discrete cosine transform includes a predetermined regularity. For example, a plurality of operation equations using the same operand data are included in the processing. By continuously processing all of the operation equations, the data read into the registers 62-1 to 62-4 can be reused without being overwritten in another processing, so that accesses to RAM 60 can be suppressed.Type: GrantFiled: January 28, 1999Date of Patent: October 23, 2001Assignee: Sanyo Electric Co., Ltd.Inventors: Masaru Matsui, Masato Fuma