Patents by Inventor Masato Kobayakawa

Masato Kobayakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7858419
    Abstract: An object of the present invention is to provide a gallium nitride compound semiconductor multilayer structure useful for producing a gallium nitride compound semiconductor light-emitting device which operates at low voltage while maintaining satisfactory light emission output. The inventive gallium nitride compound semiconductor multilayer structure comprises a substrate, and an n-type layer, a light-emitting layer, and a p-type layer formed on the substrate, the light-emitting layer having a multiple quantum well structure in which a well layer and a barrier layer are alternately stacked repeatedly, said light-emitting layer being sandwiched by the n-type layer and the p-type layer, wherein the well layer comprises a thick portion and a thin portion, and the barrier layer contains a dopant.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: December 28, 2010
    Assignee: Showa Denko K.K.
    Inventors: Masato Kobayakawa, Hitoshi Takeda, Hisayuki Miki, Tetsuo Sakurai
  • Patent number: 7855386
    Abstract: An object of the present invention is to provide a low-resistance n-type Group III nitride semiconductor layered structure having excellent flatness and few pits. The inventive n-type group III nitride semiconductor layered structure comprises a substrate and, stacked on the substrate, an n-type impurity concentration periodic variation layer comprising an n-type impurity atom higher concentration layer and an n-type impurity atom lower concentration layer, said lower concentration layer being stacked on said higher concentration layer.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: December 21, 2010
    Assignee: Showa Denko K.K.
    Inventors: Akira Bandoh, Hiromitsu Sakai, Masato Kobayakawa, Mineo Okuyama, Hideki Tomozawa, Hisayuki Miki, Joseph Gaze, Syunji Horikawa, Tetsuo Sakurai
  • Patent number: 7674644
    Abstract: A method for the fabrication of a Group III nitride semiconductor includes the steps of installing a substrate in a reaction vessel, forming a Group III nitride semiconductor on the substrate, causing a solid nitrogen compound to exist in the reaction vessel as a nitrogen source for a Group III nitride semiconductor and supplying a raw material gas as a source for a Group III element into the reaction vessel to fabricate the Group III nitride semiconductor.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: March 9, 2010
    Assignee: Showa Denko K.K.
    Inventors: Masato Kobayakawa, Hisayuki Miki
  • Patent number: 7537944
    Abstract: An object of the present invention is to provide an efficient method for manufacturing a p-type group III nitride semiconductor that has adequate carrier concentration and a surface with a low occurrence of crystal damage. The inventive method for manufacturing a p-type group III nitride semiconductor comprises: (a) growing a group III nitride semiconductor containing a p-type dopant at 1000° C. or higher in an atmosphere containing H2 gas and/or NH3 gas; and (b) after the growth of the group III nitride semiconductor, substituting the H2 gas and NH3 gas with an inert gas at a temperature higher than 800° C. while reducing the temperature.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: May 26, 2009
    Assignee: Showa Denko K.K.
    Inventor: Masato Kobayakawa
  • Publication number: 20090104728
    Abstract: An object of the present invention is to provide a gallium nitride compound semiconductor multilayer structure useful for producing a gallium nitride compound semiconductor light-emitting device which operates at low voltage while maintaining satisfactory light emission output. The inventive gallium nitride compound semiconductor multilayer structure comprises a substrate, and an n-type layer, a light-emitting layer, and a p-type layer formed on the substrate, the light-emitting layer having a multiple quantum well structure in which a well layer and a barrier layer are alternately stacked repeatedly, said light-emitting layer being sandwiched by the n-type layer and the p-type layer, wherein the well layer comprises a thick portion and a thin portion, and the barrier layer contains a dopant.
    Type: Application
    Filed: December 18, 2008
    Publication date: April 23, 2009
    Applicant: SHOWA DENKO K.K.
    Inventors: Masato KOBAYAKAWA, Hitoshi TAKEDA, Hisayuki MIKI, Tetsuo SAKURAI
  • Patent number: 7488971
    Abstract: A nitride semiconductor product including an n-type layer, a light-emitting layer, and a p-type layer which are formed of a nitride semiconductor and sequentially stacked on a substrate in the above order, the light-emitting layer having a quantum well structure in which a well layer is sandwiched by barrier layers having band gaps wider than the band gap of the well layer. Each barrier layer includes a barrier sublayer C which has been grown at a temperature higher than a growth temperature of the well layer, and a barrier sublayer E which has been grown at a temperature lower than a growth temperature of the barrier sublayer C. The barrier sublayer C is disposed closer to the substrate with respect to the barrier sublayer E.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: February 10, 2009
    Assignee: Showa Denko K.K.
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Mineo Okuyama
  • Patent number: 7482635
    Abstract: An object of the present invention is to provide a gallium nitride compound semiconductor multilayer structure useful for producing a gallium nitride compound semiconductor light-emitting device which operates at low voltage while maintaining satisfactory light emission output. The inventive gallium nitride compound semiconductor multilayer structure comprises a substrate, and an n-type layer, a light-emitting layer, and a p-type layer formed on the substrate, the light-emitting layer having a multiple quantum well structure in which a well layer and a barrier layer are alternately stacked repeatedly, said light-emitting layer being sandwiched by the n-type layer and the p-type layer, wherein the well layer comprises a thick portion and a thin portion, and the barrier layer contains a dopant.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: January 27, 2009
    Assignee: Showa Denko K.K.
    Inventors: Masato Kobayakawa, Hitoshi Takeda, Hisayuki Miki, Tetsuo Sakurai
  • Patent number: 7453091
    Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity element and, in combination therewith, hydrogen.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: November 18, 2008
    Assignee: Showa Denko K.K.
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Hisayuki Miki
  • Patent number: 7436045
    Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride (GaN) compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity and, in combination therewith, hydrogen. The top portion includes a region containing a Group III element and a Group V element at a non-stoichiometric atomic ratio.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: October 14, 2008
    Assignee: Showa Denko K.K.
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Hisayuki Miki
  • Publication number: 20080230800
    Abstract: An object of the present invention is to provide a low-resistance n-type Group III nitride semiconductor layered structure having excellent flatness and few pits. The inventive n-type group III nitride semiconductor layered structure comprises a substrate and, stacked on the substrate, an n-type impurity concentration periodic variation layer comprising an n-type impurity atom higher concentration layer and an n-type impurity atom lower concentration layer, said lower concentration layer being stacked on said higher concentration layer.
    Type: Application
    Filed: April 27, 2005
    Publication date: September 25, 2008
    Inventors: Akira Bandoh, Hiromitsu Sakai, Masato Kobayakawa, Mineo Okuyama, Hideki Tomozawa, Hisayuki Miki, Joseph Gaze, Syunji Horikawa, Tetsuo Sakurai
  • Publication number: 20080076200
    Abstract: A method for the fabrication of a Group III nitride semiconductor includes the steps of installing a substrate in a reaction vessel, forming a Group III nitride semiconductor on the substrate, causing a solid nitrogen compound to exist in the reaction vessel as a nitrogen source for a Group III nitride semiconductor and supplying a raw material gas as a source for a Group III element into the reaction vessel to fabricate the Group III nitride semiconductor.
    Type: Application
    Filed: September 12, 2005
    Publication date: March 27, 2008
    Applicant: SHOWA DENKO K.K.
    Inventors: Masato Kobayakawa, Hisayuki Miki
  • Publication number: 20070187693
    Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity element and, in combination therewith, hydrogen.
    Type: Application
    Filed: March 3, 2005
    Publication date: August 16, 2007
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Hisayuki Miki
  • Publication number: 20070170457
    Abstract: An object of the present invention is to provide a gallium nitride compound semiconductor multilayer structure useful for producing a gallium nitride compound semiconductor light-emitting device which operates at low voltage while maintaining satisfactory light emission output. The inventive gallium nitride compound semiconductor multilayer structure comprises a substrate, and an n-type layer, a light-emitting layer, and a p-type layer formed on the substrate, the light-emitting layer having a multiple quantum well structure in which a well layer and a barrier layer are alternately stacked repeatedly, said light-emitting layer being sandwiched by the n-type layer and the p-type layer, wherein the well layer comprises a thick portion and a thin portion, and the barrier layer contains a dopant.
    Type: Application
    Filed: February 23, 2005
    Publication date: July 26, 2007
    Applicant: SHOWA DENKO K.K.
    Inventors: Masato Kobayakawa, Hitoshi Takeda, Hisayuki Miki, Tetsuo Sakurai
  • Publication number: 20070152232
    Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride (GaN) compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity and, in combination therewith, hydrogen. The top portion includes a region containing a Group III element and a Group V element at a non-stoichiometric atomic ratio.
    Type: Application
    Filed: March 3, 2005
    Publication date: July 5, 2007
    Applicant: SHOWA DENKO K.K.
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Hisayuki Miki
  • Publication number: 20070090369
    Abstract: An object of the present invention is to provide an efficient method for manufacturing a p-type group III nitride semiconductor that has adequate carrier concentration and a surface with a low occurrence of crystal damage. The inventive method for manufacturing a p-type group III nitride semiconductor comprises: (a) growing a group III nitride semiconductor containing a p-type dopant at 1000° C. or higher in an atmosphere containing H2 gas and/or NH3 gas; and (b) after the growth of the group III nitride semiconductor, substituting the H2 gas and NH3 gas with an inert gas at a temperature higher than 800° C. while reducing the temperature.
    Type: Application
    Filed: November 4, 2004
    Publication date: April 26, 2007
    Inventor: Masato Kobayakawa
  • Publication number: 20070012932
    Abstract: An object of the present invention is to provide a nitride semiconductor product which causes no time-dependent deterioration in reverse withstand voltage and maintains a satisfactory initial reverse withstand voltage. The inventive nitride semiconductor product comprises an n-type layer, a light-emitting layer, and a p-type layer which are formed of a nitride semiconductor and sequentially stacked on a substrate in the above order, the light-emitting layer having a quantum well structure in which a well layer is sandwiched by barrier layers having band gaps wider than the band gap of the well layer, wherein each barrier layer comprises a barrier sublayer C which has been grown at a temperature higher than a growth temperature of the well layer, and a barrier sublayer E which has been grown at a temperature lower than a growth temperature of the barrier sublayer C, and the barrier sublayer C is disposed closer to the substrate with respect to the barrier sublayer E.
    Type: Application
    Filed: October 1, 2004
    Publication date: January 18, 2007
    Inventors: Masato Kobayakawa, Hideki Tomozawa, Mineo Okuyama